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Searched refs:MCID (Results 1 – 25 of 81) sorted by relevance

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/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCInstrDesc.h143 namespace MCID {
395 return Flags & (1ULL << MCID::ExtractSubreg); in isExtractSubregLike()
419 return Flags & (1ULL << MCID::VariadicOpsAreDefs); in variadicOpsAreDefs()
428 return Flags & (1ULL << MCID::Authenticated); in isAuthenticated()
448 return Flags & (1ULL << MCID::MayRaiseFPException); in mayRaiseFPException()
464 return Flags & (1ULL << MCID::UnmodeledSideEffects); in hasUnmodeledSideEffects()
498 return Flags & (1ULL << MCID::ConvertibleTo3Addr); in isConvertibleTo3Addr()
510 return Flags & (1ULL << MCID::UsesCustomInserter); in usesCustomInsertionHook()
525 return Flags & (1ULL << MCID::Rematerializable); in isRematerializable()
546 return Flags & (1ULL << MCID::ExtraSrcRegAllocReq); in hasExtraSrcRegAllocReq()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCA/
H A DAMDGPUCustomBehaviour.cpp251 if ((MCID.TSFlags & SIInstrFlags::DS) && in generateWaitCntInfo()
264 else if (MCID.mayLoad() && !(MCID.TSFlags & SIInstrFlags::IsAtomicNoRet)) in generateWaitCntInfo()
271 else if ((MCID.mayLoad() && in generateWaitCntInfo()
273 ((MCID.TSFlags & SIInstrFlags::MIMG) && !MCID.mayLoad() && in generateWaitCntInfo()
274 !MCID.mayStore())) in generateWaitCntInfo()
276 else if (MCID.mayStore()) in generateWaitCntInfo()
284 (MCID.mayStore() || (MCID.TSFlags & SIInstrFlags::IsAtomicRet))) in generateWaitCntInfo()
305 return MCID.TSFlags & SIInstrFlags::MUBUF || in isVMEM()
307 MCID.TSFlags & SIInstrFlags::MIMG; in isVMEM()
326 const MCInstrDesc &MCID = MCII.get(Opcode); in isGWS() local
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCHazardRecognizers.cpp30 if (!MCID) in isLoadAfterStore()
33 if (!MCID->mayLoad()) in isLoadAfterStore()
56 if (!MCID) in isBCTRAfterSet()
59 if (!MCID->isBranch()) in isBCTRAfterSet()
90 unsigned IIC = MCID->getSchedClass(); in mustComeFirst()
149 if (MCID && mustComeFirst(MCID, NSlots) && CurSlots) in ShouldPreferAnother()
176 if (MCID) { in EmitInstruction()
197 if (MCID->isBranch()) in EmitInstruction()
284 isLoad = MCID.mayLoad(); in GetInstrType()
285 isStore = MCID.mayStore(); in GetInstrType()
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/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DMachineInstrBuilder.h364 const MCInstrDesc &MCID) { in BuildMI() argument
386 MachineInstr *MI = MF.CreateMachineInstr(MCID, MIMD.getDL()); in BuildMI()
425 return BuildMI(BB, *I, MIMD, MCID, DestReg); in BuildMI()
434 const MCInstrDesc &MCID) { in BuildMI() argument
444 const MCInstrDesc &MCID) { in BuildMI() argument
453 const MCInstrDesc &MCID) { in BuildMI() argument
463 const MCInstrDesc &MCID) { in BuildMI() argument
464 return BuildMI(BB, *I, MIMD, MCID); in BuildMI()
471 const MCInstrDesc &MCID) { in BuildMI() argument
472 return BuildMI(*BB, BB->end(), MIMD, MCID); in BuildMI()
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H A DMachineInstr.h896 return hasProperty(MCID::Pseudo, Type);
902 return hasProperty(MCID::Meta, Type);
906 return hasProperty(MCID::Return, Type);
916 return hasProperty(MCID::Call, Type);
931 return hasProperty(MCID::Barrier, Type);
948 return hasProperty(MCID::Branch, Type);
985 return hasProperty(MCID::Compare, Type);
991 return hasProperty(MCID::MoveImm, Type);
997 return hasProperty(MCID::MoveReg, Type);
1002 return hasProperty(MCID::Bitcast, Type);
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kInstrBuilder.h63 const MCInstrDesc &MCID = MI->getDesc(); variable
65 if (MCID.mayLoad())
67 if (MCID.mayStore())
80 const MCInstrDesc &MCID = MI->getDesc(); variable
82 if (MCID.mayLoad())
84 if (MCID.mayStore())
/freebsd-14.2/contrib/llvm-project/llvm/lib/MCA/
H A DCodeEmitter.cpp18 CodeEmitter::EncodingInfo CodeEmitter::getOrCreateEncodingInfo(unsigned MCID) { in getOrCreateEncodingInfo() argument
19 EncodingInfo &EI = Encodings[MCID]; in getOrCreateEncodingInfo()
24 const MCInst &Inst = Sequence[MCID]; in getOrCreateEncodingInfo()
25 MCInst Relaxed(Sequence[MCID]); in getOrCreateEncodingInfo()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DThumb2SizeReduction.cpp654 if (MCID.hasOptionalDef() && in ReduceSpecial()
813 const MCInstrDesc &MCID = MI->getDesc(); in ReduceTo2Addr() local
814 if (MCID.hasOptionalDef()) { in ReduceTo2Addr()
837 unsigned NumOps = MCID.getNumOperands(); in ReduceTo2Addr()
873 const MCInstrDesc &MCID = MI->getDesc(); in ReduceToNarrow() local
875 if (MCID.operands()[i].isPredicate()) in ReduceToNarrow()
905 if (MCID.hasOptionalDef()) { in ReduceToNarrow()
927 if (MCID.getOpcode() == ARM::t2TEQrr) { in ReduceToNarrow()
943 unsigned NumOps = MCID.getNumOperands(); in ReduceToNarrow()
949 MCID.getOpcode() == ARM::t2SXTB || in ReduceToNarrow()
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H A DARMHazardRecognizer.cpp31 const MCInstrDesc &MCID = MI->getDesc(); in hasRAWHazard() local
32 unsigned Domain = MCID.TSFlags & ARMII::DomainMask; in hasRAWHazard()
35 unsigned Opcode = MCID.getOpcode(); in hasRAWHazard()
52 const MCInstrDesc &MCID = MI->getDesc(); in getHazardType() local
53 if (LastMI && (MCID.TSFlags & ARMII::DomainMask) != ARMII::DomainGeneral) { in getHazardType()
H A DMLxExpansionPass.cpp184 const MCInstrDesc &MCID = MI->getDesc(); in hasRAWHazard() local
185 unsigned Domain = MCID.TSFlags & ARMII::DomainMask; in hasRAWHazard()
188 unsigned Opcode = MCID.getOpcode(); in hasRAWHazard()
339 const MCInstrDesc &MCID = MI->getDesc(); in ExpandFPMLxInstructions() local
346 unsigned Domain = MCID.TSFlags & ARMII::DomainMask; in ExpandFPMLxInstructions()
356 if (!TII->isFpMLxInstruction(MCID.getOpcode(), in ExpandFPMLxInstructions()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/
H A DScoreboardHazardRecognizer.cpp122 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in getHazardType() local
123 if (!MCID) { in getHazardType()
127 unsigned idx = MCID->getSchedClass(); in getHazardType()
177 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in EmitInstruction() local
178 assert(MCID && "The scheduler must filter non-machineinstrs"); in EmitInstruction()
179 if (DAG->TII->isZeroCost(MCID->Opcode)) in EmitInstruction()
186 unsigned idx = MCID->getSchedClass(); in EmitInstruction()
H A DMachineInstr.cpp88 for (MCPhysReg ImpDef : MCID->implicit_defs()) in addImplicitDefUseOperands()
104 if (unsigned NumOps = MCID->getNumOperands() + MCID->implicit_defs().size() + in MachineInstr()
144 MCID = &TID; in setDesc()
751 if (!MCID->isVariadic()) in getNumExplicitOperands()
769 unsigned NumDefs = MCID->getNumDefs(); in getNumExplicitDefs()
770 if (!MCID->isVariadic()) in getNumExplicitDefs()
1096 const MCInstrDesc &MCID = getDesc(); in findFirstPredOperandIdx() local
1097 if (MCID.isPredicable()) { in findFirstPredOperandIdx()
1099 if (MCID.operands()[i].isPredicate()) in findFirstPredOperandIdx()
1524 const MCInstrDesc &MCID = getDesc(); in hasComplexRegisterTies() local
[all …]
H A DBreakFalseDeps.cpp192 const MCInstrDesc &MCID = MI->getDesc(); in processDefs() local
196 for (unsigned i = MCID.getNumDefs(), e = MCID.getNumOperands(); i != e; ++i) { in processDefs()
218 e = MI->isVariadic() ? MI->getNumOperands() : MCID.getNumDefs(); in processDefs()
H A DMachineVerifier.cpp1029 const MCInstrDesc &MCID = MI->getDesc(); in verifyPreISelGenericInstruction() local
1053 if (!MCID.operands()[I].isGenericType()) in verifyPreISelGenericInstruction()
1856 const MCInstrDesc &MCID = MI->getDesc(); in visitMachineInstrBefore() local
1928 unsigned Opc = MCID.getOpcode(); in visitMachineInstrBefore()
2095 const MCInstrDesc &MCID = MI->getDesc(); in visitMachineOperand() local
2096 unsigned NumDefs = MCID.getNumDefs(); in visitMachineOperand()
2109 } else if (MONum < MCID.getNumOperands()) { in visitMachineOperand()
2189 if (MONum < MCID.getNumDefs()) { in visitMachineOperand()
2223 if (MONum < MCID.getNumOperands()) { in visitMachineOperand()
2309 MONum < MCID.getNumOperands() && in visitMachineOperand()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DValueMapper.cpp88 unsigned MCID : 29; member
162 unsigned MCID);
166 unsigned MCID);
168 unsigned MCID);
914 CurrentMCID = E.MCID; in flush()
1111 WE.MCID = MCID; in scheduleMapGlobalInitializer()
1127 WE.MCID = MCID; in scheduleMapAppendingVariable()
1137 unsigned MCID) { in scheduleMapAliasOrIFunc() argument
1145 WE.MCID = MCID; in scheduleMapAliasOrIFunc()
1157 WE.MCID = MCID; in scheduleRemapFunction()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZInstrBuilder.h29 const MCInstrDesc &MCID = MI->getDesc(); in addFrameReference() local
31 if (MCID.mayLoad()) in addFrameReference()
33 if (MCID.mayStore()) in addFrameReference()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/MCA/
H A DCodeEmitter.h49 EncodingInfo getOrCreateEncodingInfo(unsigned MCID);
56 StringRef getEncoding(unsigned MCID) { in getEncoding() argument
57 EncodingInfo EI = getOrCreateEncodingInfo(MCID); in getEncoding()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVFoldMasks.cpp148 const MCInstrDesc &MCID = TII->get(Opc); in convertToUnmasked() local
149 const bool HasPolicyOp = RISCVII::hasVecPolicyOp(MCID.TSFlags); in convertToUnmasked()
150 const bool HasPassthru = RISCVII::isFirstDefTiedToFirstUse(MCID); in convertToUnmasked()
154 RISCVII::hasVecPolicyOp(MCID.TSFlags) && in convertToUnmasked()
160 MI.setDesc(MCID); in convertToUnmasked()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/VE/
H A DLVLGen.cpp41 const MCInstrDesc &MCID = TII->get(Opcode); in getVLIndex() local
44 if (HAS_VLINDEX(MCID.TSFlags)) in getVLIndex()
45 return GET_VLINDEX(MCID.TSFlags); in getVLIndex()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGFast.cpp250 const MCInstrDesc &MCID = TII->get(N->getMachineOpcode()); in CopyAndMoveSuccessors() local
251 for (unsigned i = 0; i != MCID.getNumOperands(); ++i) { in CopyAndMoveSuccessors()
252 if (MCID.getOperandConstraint(i, MCOI::TIED_TO) != -1) { in CopyAndMoveSuccessors()
257 if (MCID.isCommutable()) in CopyAndMoveSuccessors()
424 const MCInstrDesc &MCID = TII->get(N->getMachineOpcode()); in getPhysicalRegisterVT() local
425 assert(!MCID.implicit_defs().empty() && in getPhysicalRegisterVT()
427 NumRes = MCID.getNumDefs(); in getPhysicalRegisterVT()
428 for (MCPhysReg ImpDef : MCID.implicit_defs()) { in getPhysicalRegisterVT()
524 const MCInstrDesc &MCID = TII->get(Node->getMachineOpcode()); in DelayForLiveRegsBottomUp() local
525 for (MCPhysReg Reg : MCID.implicit_defs()) in DelayForLiveRegsBottomUp()
H A DScheduleDAGSDNodes.cpp215 const MCInstrDesc &MCID = TII->get(N->getMachineOpcode()); in ClusterNeighboringLoads() local
216 for (unsigned I = 0; I != MCID.getNumOperands(); ++I) { in ClusterNeighboringLoads()
217 if (MCID.getOperandConstraint(I, MCOI::TIED_TO) != -1) in ClusterNeighboringLoads()
321 const MCInstrDesc &MCID = TII->get(Opc); in ClusterNodes() local
322 if (MCID.mayLoad()) in ClusterNodes()
453 const MCInstrDesc &MCID = TII->get(Opc); in AddSchedEdges() local
454 for (unsigned i = 0; i != MCID.getNumOperands(); ++i) { in AddSchedEdges()
455 if (MCID.getOperandConstraint(i, MCOI::TIED_TO) != -1) { in AddSchedEdges()
460 if (MCID.isCommutable()) in AddSchedEdges()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCChecker.cpp93 const MCInstrDesc &MCID = HexagonMCInstrInfo::getDesc(MCII, MCI); in init() local
98 for (unsigned i = MCID.getNumDefs(); i < MCID.getNumOperands(); ++i) in init()
101 for (MCPhysReg ImpUse : MCID.implicit_uses()) in init()
109 for (MCPhysReg R : MCID.implicit_defs()) { in init()
110 if (Hexagon::R31 != R && MCID.isCall()) in init()
135 for (unsigned i = 0; i < MCID.getNumDefs(); ++i) { in init()
188 for (unsigned i = MCID.getNumDefs(); i < MCID.getNumOperands(); ++i) in init()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ConditionalCompares.cpp630 const MCInstrDesc &MCID = TII->get(Opc); in convert() local
633 MRI->createVirtualRegister(TII->getRegClass(MCID, 0, TRI, *MF)); in convert()
635 BuildMI(*Head, Head->end(), TermDL, MCID) in convert()
642 TII->getRegClass(MCID, 1, TRI, *MF)); in convert()
687 const MCInstrDesc &MCID = TII->get(Opc); in convert() local
689 TII->getRegClass(MCID, 0, TRI, *MF)); in convert()
692 TII->getRegClass(MCID, 1, TRI, *MF)); in convert()
693 MachineInstrBuilder MIB = BuildMI(*Head, CmpMI, CmpMI->getDebugLoc(), MCID) in convert()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DLegalizerInfo.cpp383 const MCInstrDesc &MCID = MII.get(Opcode); in verify() local
385 MCID.operands().begin(), MCID.operands().end(), 0U, in verify()
392 MCID.operands().begin(), MCID.operands().end(), 0U, in verify()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrBuilder.h202 const MCInstrDesc &MCID = MI->getDesc(); variable
204 if (MCID.mayLoad())
206 if (MCID.mayStore())

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