Searched refs:M0Val (Results 1 – 2 of 2) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructionSelector.cpp | 885 Register M0Val = MI.getOperand(6).getReg(); in selectInterpP1F16() local 886 if (!RBI.constrainGenericRegister(M0Val, AMDGPU::SReg_32RegClass, *MRI) || in selectInterpP1F16() 903 .addReg(M0Val); in selectInterpP1F16() 1621 Register M0Val = MI.getOperand(2).getReg(); in selectDSOrderedIntrinsic() local 1623 .addReg(M0Val); in selectDSOrderedIntrinsic() 1633 if (!RBI.constrainGenericRegister(M0Val, AMDGPU::SReg_32RegClass, *MRI)) in selectDSOrderedIntrinsic() 5587 Register M0Val; in selectNamedBarrierInst() local 5599 M0Val = TmpReg0; in selectNamedBarrierInst() 5612 M0Val = TmpReg1; in selectNamedBarrierInst() 5614 M0Val = BarOp.getReg(); in selectNamedBarrierInst() [all …]
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| H A D | SIISelLowering.cpp | 9103 SDValue M0Val = copyToM0(DAG, Chain, DL, Op.getOperand(2)); in LowerINTRINSIC_W_CHAIN() local 9104 Ops.push_back(M0Val.getValue(0)); in LowerINTRINSIC_W_CHAIN() 9571 SDValue M0Val = copyToM0(DAG, Chain, DL, Op.getOperand(3)); in LowerINTRINSIC_VOID() local 9593 Ops.push_back(M0Val.getValue(0)); // Chain in LowerINTRINSIC_VOID() 9594 Ops.push_back(M0Val.getValue(1)); // Glue in LowerINTRINSIC_VOID() 9641 SDValue M0Val = copyToM0(DAG, Chain, DL, Op.getOperand(3)); in LowerINTRINSIC_VOID() local 9676 Ops.push_back(M0Val.getValue(0)); // Chain in LowerINTRINSIC_VOID() 9677 Ops.push_back(M0Val.getValue(1)); // Glue in LowerINTRINSIC_VOID() 9753 SDValue M0Val; in LowerINTRINSIC_VOID() local 9755 M0Val = DAG.getNode(ISD::SHL, DL, MVT::i32, Op.getOperand(3), in LowerINTRINSIC_VOID() [all …]
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