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Searched refs:Is64 (Results 1 – 22 of 22) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/Object/
H A DELFTypes.h48 template <endianness E, bool Is64> struct ELFType {
55 static const bool Is64Bits = Is64;
58 using Ehdr = Elf_Ehdr_Impl<ELFType<E, Is64>>;
59 using Shdr = Elf_Shdr_Impl<ELFType<E, Is64>>;
60 using Sym = Elf_Sym_Impl<ELFType<E, Is64>>;
61 using Dyn = Elf_Dyn_Impl<ELFType<E, Is64>>;
62 using Phdr = Elf_Phdr_Impl<ELFType<E, Is64>>;
71 using Hash = Elf_Hash_Impl<ELFType<E, Is64>>;
73 using Chdr = Elf_Chdr_Impl<ELFType<E, Is64>>;
74 using Nhdr = Elf_Nhdr_Impl<ELFType<E, Is64>>;
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/freebsd-14.2/contrib/llvm-project/llvm/lib/ObjectYAML/
H A DXCOFFYAML.cpp228 static void auxSymMapping(IO &IO, XCOFFYAML::CsectAuxEnt &AuxSym, bool Is64) { in auxSymMapping() argument
233 if (Is64) { in auxSymMapping()
249 if (Is64) { in auxSymMapping()
258 bool Is64) { in auxSymMapping() argument
259 if (!Is64) in auxSymMapping()
292 const bool Is64 = in mapping() local
302 if (!Is64) { in mapping()
312 auxSymMapping(IO, *cast<XCOFFYAML::FunctionAuxEnt>(AuxSym.get()), Is64); in mapping()
316 auxSymMapping(IO, *cast<XCOFFYAML::BlockAuxEnt>(AuxSym.get()), Is64); in mapping()
324 auxSymMapping(IO, *cast<XCOFFYAML::CsectAuxEnt>(AuxSym.get()), Is64); in mapping()
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H A DELFYAML.cpp1289 const bool Is64 = static_cast<ELFYAML::Object *>(Ctx)->Header.Class == in input() local
1298 const int64_t MinVal = Is64 ? INT64_MIN : INT32_MIN; in input()
1306 const uint64_t MaxVal = Is64 ? UINT64_MAX : UINT32_MAX; in input()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/ObjCopy/
H A DCommonConfig.h41 MachineInfo(uint16_t EM, uint8_t ABI, bool Is64, bool IsLittle) in MachineInfo()
42 : EMachine(EM), OSABI(ABI), Is64Bit(Is64), IsLittleEndian(IsLittle) {} in MachineInfo()
44 MachineInfo(uint16_t EM, bool Is64, bool IsLittle) in MachineInfo()
45 : MachineInfo(EM, ELF::ELFOSABI_NONE, Is64, IsLittle) {} in MachineInfo()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/
H A DPPCAsmBackend.cpp232 bool Is64 = TT.isPPC64(); in createObjectTargetWriter() local
233 return createPPCELFObjectWriter(Is64, OSABI); in createObjectTargetWriter()
/freebsd-14.2/contrib/llvm-project/llvm/tools/llvm-objdump/
H A DCOFFDump.cpp44 Is64 = !Obj.getPE32Header(); in COFFDumper()
52 return format_hex_no_prefix(V, Is64 ? 16 : 8); in formatAddr()
56 return Is64 ? 0 : static_cast<const pe32_header *>(Hdr)->BaseOfData; in getBaseOfData()
60 bool Is64; member in __anona028bc1c0111::COFFDumper
121 if (!Is64) in printPEHeader()
H A DMachODump.cpp7662 CompactUnwindEntry(StringRef Contents, unsigned Offset, bool Is64) in CompactUnwindEntry()
7664 if (Is64) in CompactUnwindEntry()
7767 bool Is64 = Obj->is64Bit(); in printMachOCompactUnwindSection() local
7768 uint32_t PointerSize = Is64 ? sizeof(uint64_t) : sizeof(uint32_t); in printMachOCompactUnwindSection()
7777 CompactUnwindEntry Entry(Contents, Offset, Is64); in printMachOCompactUnwindSection()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsELFObjectWriter.cpp59 MipsELFObjectWriter(uint8_t OSABI, bool HasRelocationAddend, bool Is64);
214 bool HasRelocationAddend, bool Is64) in MipsELFObjectWriter() argument
215 : MCELFObjectTargetWriter(Is64, OSABI, ELF::EM_MIPS, HasRelocationAddend) {} in MipsELFObjectWriter()
/freebsd-14.2/contrib/llvm-project/llvm/lib/ObjCopy/COFF/
H A DCOFFWriter.cpp195 PeHeaderSize = Obj.Is64 ? sizeof(pe32plus_header) : sizeof(pe32_header); in finalize()
292 if (Obj.Is64) { in writeHeaders()
H A DCOFFObject.h103 bool Is64 = false; member
H A DCOFFReader.cpp28 Obj.Is64 = COFFObj.is64(); in readExecutableHeaders()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstructionSelector.cpp283 static unsigned getLogicalBitOpcode(unsigned Opc, bool Is64) { in getLogicalBitOpcode() argument
286 return Is64 ? AMDGPU::S_AND_B64 : AMDGPU::S_AND_B32; in getLogicalBitOpcode()
288 return Is64 ? AMDGPU::S_OR_B64 : AMDGPU::S_OR_B32; in getLogicalBitOpcode()
290 return Is64 ? AMDGPU::S_XOR_B64 : AMDGPU::S_XOR_B32; in getLogicalBitOpcode()
307 I.setDesc(TII.get(getLogicalBitOpcode(I.getOpcode(), Is64))); in selectG_AND_OR_XOR()
1418 const bool Is64 = Size == 64; in selectBallot() local
1423 if (Size != STI.getWavefrontSize() && (!Is64 || !IsWave32)) in selectBallot()
2000 unsigned SubReg = Is64 ? AMDGPU::sub0_sub1 : AMDGPU::sub0; in selectImageIntrinsic()
2907 const bool Is64 = STI.isWave64(); in selectG_BRCOND() local
3119 const bool Is64 = DstTy.getSizeInBits() == 64; in selectG_EXTRACT_VECTOR_ELT() local
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H A DMIMGInstructions.td1405 class MIMG_IntersectRay_Helper<bit Is64, bit IsA16> {
1406 int num_addrs = !if(Is64, !if(IsA16, 9, 12), !if(IsA16, 8, 11));
1411 RegisterClass node_ptr_type = !if(Is64, VReg_64, VGPR_32);
1456 multiclass MIMG_IntersectRay<mimgopc op, string opcode, bit Is64, bit IsA16> {
1457 defvar info = MIMG_IntersectRay_Helper<Is64, IsA16>;
H A DAMDGPULegalizerInfo.cpp6730 const bool Is64 = MRI.getType(NodePtr).getSizeInBits() == 64; in legalizeBVHIntrinsic() local
6732 const unsigned NumVAddrDwords = IsA16 ? (Is64 ? 9 : 8) : (Is64 ? 12 : 11); in legalizeBVHIntrinsic()
6743 Opcode = AMDGPU::getMIMGOpcode(BaseOpcodes[Is64][IsA16], in legalizeBVHIntrinsic()
6750 Opcode = AMDGPU::getMIMGOpcode(BaseOpcodes[Is64][IsA16], in legalizeBVHIntrinsic()
6793 if (Is64) { in legalizeBVHIntrinsic()
H A DAMDGPURegisterBankInfo.cpp895 bool Is64 = OpSize % 64 == 0; in executeInWaterfallLoop() local
896 unsigned PartSize = Is64 ? 64 : 32; in executeInWaterfallLoop()
H A DSIISelLowering.cpp8939 const bool Is64 = NodePtr.getValueType() == MVT::i64; in LowerINTRINSIC_W_CHAIN() local
8941 const unsigned NumVAddrDwords = IsA16 ? (Is64 ? 9 : 8) : (Is64 ? 12 : 11); in LowerINTRINSIC_W_CHAIN()
8952 Opcode = AMDGPU::getMIMGOpcode(BaseOpcodes[Is64][IsA16], in LowerINTRINSIC_W_CHAIN()
8959 Opcode = AMDGPU::getMIMGOpcode(BaseOpcodes[Is64][IsA16], in LowerINTRINSIC_W_CHAIN()
9014 if (Is64) in LowerINTRINSIC_W_CHAIN()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonBitTracker.cpp1253 bool Is64 = DoubleRegsRegClass.contains(PReg); in getNextPhysReg() local
1254 assert(PReg == 0 || Is64 || IntRegsRegClass.contains(PReg)); in getNextPhysReg()
1268 if (!Is64) { in getNextPhysReg()
/freebsd-14.2/contrib/llvm-project/llvm/tools/llvm-readobj/
H A DELFDumper.cpp4455 constexpr bool Is64 = ELFT::Is64Bits; in printSectionDetails() local
4457 {Is64 ? "Address" : "Addr", 23}, in printSectionDetails()
4458 {"Off", Is64 ? 40 : 32}, in printSectionDetails()
4459 {"Size", Is64 ? 47 : 39}, in printSectionDetails()
4460 {"ES", Is64 ? 54 : 46}, in printSectionDetails()
4461 {"Lk", Is64 ? 59 : 51}, in printSectionDetails()
4462 {"Inf", Is64 ? 62 : 54}, in printSectionDetails()
4463 {"Al", Is64 ? 66 : 57}}); in printSectionDetails()
4474 const unsigned AddrSize = Is64 ? 16 : 8; in printSectionDetails()
4492 {to_string(S.sh_link), Is64 ? 59 : 51}, in printSectionDetails()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/DWP/
H A DDWP.cpp343 bool Is64 = isa<object::ELF64LEObjectFile>(Obj) || in handleCompressedSection() local
345 Expected<Decompressor> Dec = Decompressor::create(Name, Contents, IsLE, Is64); in handleCompressedSection()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Object/
H A DMachOObjectFile.cpp101 bool Is64 = O.is64Bit(); in getSectionPtr() local
102 unsigned SegmentLoadSize = Is64 ? sizeof(MachO::segment_command_64) : in getSectionPtr()
104 unsigned SectionSize = Is64 ? sizeof(MachO::section_64) : in getSectionPtr()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/AsmParser/
H A DX86AsmParser.cpp3073 bool Is64 = X86MCRegisterClasses[X86::GR64RegClassID].contains(BaseReg) || in ParseMemOperand() local
3076 if (Is64) { in ParseMemOperand()
/freebsd-14.2/contrib/llvm-project/clang/lib/CodeGen/
H A DCGBuiltin.cpp11426 bool Is64 = Ops[0]->getType()->getPrimitiveSizeInBits() == 64; in EmitAArch64BuiltinExpr() local
11427 llvm::Type *InTy = Is64 ? Int64Ty : Int32Ty; in EmitAArch64BuiltinExpr()
11428 llvm::Type *FTy = Is64 ? DoubleTy : FloatTy; in EmitAArch64BuiltinExpr()