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Searched refs:Insn (Results 1 – 25 of 58) sorted by relevance

123

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/XCore/Disassembler/
H A DXCoreDisassembler.cpp52 Insn = (Bytes[0] << 0) | (Bytes[1] << 8); in readInstruction16()
64 Insn = in readInstruction32()
217 unsigned Combined = fieldFromInstruction(Insn, 6, 5); in Decode2OpInstruction()
220 if (fieldFromInstruction(Insn, 5, 1)) { in Decode2OpInstruction()
236 unsigned Combined = fieldFromInstruction(Insn, 6, 5); in Decode3OpInstruction()
253 unsigned Opcode = fieldFromInstruction(Insn, 11, 5); in Decode2OpInstructionFail()
323 DecodeStatus S = Decode2OpInstruction(Insn, Op1, Op2); in Decode2RInstruction()
416 unsigned Opcode = fieldFromInstruction(Insn, 16, 4) | in DecodeL2OpInstructionFail()
645 unsigned Opcode = fieldFromInstruction(Insn, 27, 5); in DecodeL5RInstructionFail()
678 unsigned Op4 = fieldFromInstruction(Insn, 16, 4); in DecodeL4RSrcDstInstruction()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AVR/Disassembler/
H A DAVRDisassembler.cpp145 addr |= fieldFromInstruction(Insn, 0, 4); in decodeFIOARr()
235 k |= fieldFromInstruction(Insn, 0, 4); in decodeFWRdK()
266 if (Insn > 127) in decodeMemri()
281 switch (Insn & 0xf000) { in decodeFBRk()
311 return (Insn & 0x407) != I.first; in decodeCondBranch()
338 if ((Insn & 0xf000) == 0x8000) { in decodeLoadStore()
373 if ((Insn & 0xfc00) != 0x9000 || (Insn & 0xf) == 0) in decodeLoadStore()
378 switch (Insn & 0xc) { in decodeLoadStore()
393 switch (Insn & 0x203) { in decodeLoadStore()
458 Insn = in readInstruction32()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARC/Disassembler/
H A DARCDisassembler.cpp54 Insn = in readInstruction32()
172 unsigned S9 = Insn & 0x1ff; in DecodeMEMrs9()
233 DstB = decodeBField(Insn); in DecodeStLImmInstruction()
238 SrcC = decodeCField(Insn); in DecodeStLImmInstruction()
240 LImm = (Insn >> 32); in DecodeStLImmInstruction()
251 SrcB = decodeBField(Insn); in DecodeLdLImmInstruction()
256 DstA = decodeAField(Insn); in DecodeLdLImmInstruction()
258 LImm = (Insn >> 32); in DecodeLdLImmInstruction()
269 DstA = decodeAField(Insn); in DecodeLdRLImmInstruction()
271 SrcB = decodeBField(Insn); in DecodeLdRLImmInstruction()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp721 uint32_t Cond = (Insn >> 28) & 0xF; in checkDecodedInstruction()
2094 if (!fieldFromInstruction(Insn, 23, 1)) in DecodeAddrMode2IdxInstruction()
2801 fieldFromInstruction(Insn, 4,4) != 0) in DecodeSETPANInstruction()
2804 fieldFromInstruction(Insn, 0,4) != 0) in DecodeSETPANInstruction()
4774 if(!fieldFromInstruction(Insn, 7, 1)) { in DecodeMveAddrModeQ()
5260 if (fieldFromInstruction(Insn, 4, 1)) in DecodeVLD1LN()
5265 if (fieldFromInstruction(Insn, 5, 1)) in DecodeVLD1LN()
5268 if (fieldFromInstruction(Insn, 4, 1)) in DecodeVLD1LN()
5272 if (fieldFromInstruction(Insn, 6, 1)) in DecodeVLD1LN()
5327 if (fieldFromInstruction(Insn, 4, 1)) in DecodeVST1LN()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Lanai/Disassembler/
H A DLanaiDisassembler.cpp84 Insn = in readInstruction32()
101 AluOp = (Insn >> 8) & 0x7; in PostOperandDecodeAdjust()
109 unsigned PQ = (Insn >> PqShift) & 0x3; in PostOperandDecodeAdjust()
135 uint32_t Insn; in getInstruction() local
147 PostOperandDecodeAdjust(Instr, Insn); in getInstruction()
179 unsigned Register = (Insn >> 18) & 0x1f; in decodeRiMemoryValue()
181 unsigned Offset = (Insn & 0xffff); in decodeRiMemoryValue()
192 unsigned Register = (Insn >> 15) & 0x1f; in decodeRrMemoryValue()
194 Register = (Insn >> 10) & 0x1f; in decodeRrMemoryValue()
207 unsigned Offset = (Insn & 0x3ff); in decodeSplsValue()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/
H A DMipsDisassembler.cpp1117 Insn = (Bytes[0] << 8) | Bytes[1]; in readInstruction16()
1119 Insn = (Bytes[1] << 8) | Bytes[0]; in readInstruction16()
1146 Insn = in readInstruction32()
1165 uint32_t Insn; in getInstruction() local
1671 unsigned Offset = Insn & 0xf; in DecodeMemMMImm4()
1728 unsigned Offset = Insn & 0x1F; in DecodeMemMMSPImm5Lsl2()
1743 unsigned Offset = Insn & 0x7F; in DecodeMemMMGPImm7Lsl2()
1765 Offset = SignExtend32<4>(Insn & 0xf); in DecodeMemMMReglistImm4Lsl2()
2257 int Size = (int) Insn - Pos + 1; in DecodeInsSize()
2279 switch (Insn) { in DecodeSimm9SP()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ExpandImm.cpp44 SmallVectorImpl<ImmInsnModel> &Insn) { in tryToreplicateChunks() argument
80 Insn.push_back({ AArch64::MOVKXi, Imm16, in tryToreplicateChunks()
95 Insn.push_back({ AArch64::MOVKXi, Imm16, in tryToreplicateChunks()
468 SmallVectorImpl<ImmInsnModel> &Insn) { in expandMOVImmSimple() argument
500 Insn.push_back({ FirstOpc, Imm16, in expandMOVImmSimple()
518 Insn.push_back({ Opc, Imm16, in expandMOVImmSimple()
552 Insn.push_back({ Opc, 0, Encoding }); in expandMOVImm()
591 Insn.push_back({ AArch64::MOVKXi, Imm16, in expandMOVImm()
598 if (tryOrrOfLogicalImmediates(Imm, Insn)) in expandMOVImm()
602 if (tryAndOfLogicalImmediates(Imm, Insn)) in expandMOVImm()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFPreserveStaticOffset.cpp397 *Insn->getFunction(), in reportNonStaticGEPChain()
404 Insn->getContext().diagnose(Msg); in reportNonStaticGEPChain()
464 for (User *U : Insn->users()) { in rewriteUses()
506 Visited.push_back(Insn); in rewriteAccessChain()
516 Visited.push_back(Insn); in rewriteAccessChain()
523 if (isa<LoadInst>(Insn) || isa<StoreInst>(Insn)) { in rewriteAccessChain()
524 TryToReplace(Insn); in rewriteAccessChain()
525 } else if (isGEPAndLoad(Insn)) { in rewriteAccessChain()
533 } else if (isGEPAndStore(Insn)) { in rewriteAccessChain()
562 BufStream << *Insn; in rewriteAccessChain()
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/freebsd-14.2/sbin/ipfw/tests/
H A Dtest_add_rule.py29 from atf_python.sys.netpfil.ipfw.insns import Insn
185 Insn(IpFwOpcode.O_EXTERNAL_ACTION, arg1=1),
215 Insn(IpFwOpcode.O_COUNT),
230 Insn(IpFwOpcode.O_CHECK_STATE, arg1=1),
244 Insn(IpFwOpcode.O_PROBE_STATE, arg1=1),
245 Insn(IpFwOpcode.O_PROTO, arg1=6),
246 Insn(IpFwOpcode.O_KEEP_STATE, arg1=1),
261 Insn(IpFwOpcode.O_PROTO, arg1=6),
262 Insn(IpFwOpcode.O_KEEP_STATE, arg1=1),
289 Insn(
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Analysis/
H A DInstructionPrecedenceTracking.cpp63 const Instruction *Insn) { in isPreceededBySpecialInstruction() argument
65 getFirstSpecialInstruction(Insn->getParent()); in isPreceededBySpecialInstruction()
66 return MaybeFirstSpecial && MaybeFirstSpecial->comesBefore(Insn); in isPreceededBySpecialInstruction()
90 for (const Instruction &Insn : *BB) in validate()
91 if (isSpecialInstruction(&Insn)) { in validate()
92 assert(It->second == &Insn && in validate()
138 const Instruction *Insn) const { in isSpecialInstruction()
144 return !isGuaranteedToTransferExecutionToSuccessor(Insn); in isSpecialInstruction()
148 const Instruction *Insn) const { in isSpecialInstruction()
150 if (match(Insn, m_Intrinsic<Intrinsic::experimental_widenable_condition>())) in isSpecialInstruction()
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H A DGuardUtils.cpp40 for (auto &Insn : *DeoptBB) { in isGuardAsWidenableBranch()
41 if (match(&Insn, m_Intrinsic<Intrinsic::experimental_deoptimize>())) in isGuardAsWidenableBranch()
43 if (Insn.mayHaveSideEffects()) in isGuardAsWidenableBranch()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/MSP430/Disassembler/
H A DMSP430Disassembler.cpp181 static AddrMode DecodeSrcAddrModeI(unsigned Insn) { in DecodeSrcAddrModeI() argument
182 unsigned Rs = fieldFromInstruction(Insn, 8, 4); in DecodeSrcAddrModeI()
183 unsigned As = fieldFromInstruction(Insn, 4, 2); in DecodeSrcAddrModeI()
188 unsigned Rs = fieldFromInstruction(Insn, 0, 4); in DecodeSrcAddrModeII()
189 unsigned As = fieldFromInstruction(Insn, 4, 2); in DecodeSrcAddrModeII()
193 static AddrMode DecodeDstAddrMode(unsigned Insn) { in DecodeDstAddrMode() argument
194 unsigned Rd = fieldFromInstruction(Insn, 0, 4); in DecodeDstAddrMode()
195 unsigned Ad = fieldFromInstruction(Insn, 7, 1); in DecodeDstAddrMode()
234 AddrMode SrcAM = DecodeSrcAddrModeI(Insn); in getInstructionI()
235 AddrMode DstAM = DecodeDstAddrMode(Insn); in getInstructionI()
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/freebsd-14.2/contrib/llvm-project/llvm/utils/TableGen/
H A DPseudoLoweringEmitter.cpp55 CodeGenInstruction &Insn,
93 if (DI->getDef() != Insn.Operands[BaseIdx + i].Rec) { in addDagOperandMapping()
106 OpsAdded += Insn.Operands[i].MINumOperands; in addDagOperandMapping()
156 CodeGenInstruction Insn(Operator); in evaluateExpansion() local
158 if (Insn.isCodeGenOnly || Insn.isPseudo) { in evaluateExpansion()
166 if (Insn.Operands.size() != Dag->getNumArgs()) { in evaluateExpansion()
175 for (unsigned i = 0, e = Insn.Operands.size(); i != e; ++i) in evaluateExpansion()
176 NumMIOperands += Insn.Operands[i].MINumOperands; in evaluateExpansion()
180 addDagOperandMapping(Rec, Dag, Insn, OperandMap, 0); in evaluateExpansion()
198 for (unsigned i = 0, e = Insn.Operands.size(); i != e; ++i) { in evaluateExpansion()
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H A DDecoderEmitter.cpp448 Insn[i] = BIT_UNSET; in insnWithID()
450 Insn[i] = bitFromBits(Bits, i); in insnWithID()
496 const insn_t &Insn) const;
579 insn_t Insn; in Filter() local
1029 if (Insn[StartBit + i] == BIT_UNSET) in fieldFromInsn()
1032 if (Insn[StartBit + i] == BIT_TRUE) in fieldFromInsn()
1093 int64_t Val = Value(Insn[i]); in getIslands()
1406 insn_t Insn; in emitSingletonTableEntry() local
1407 insnWithID(Insn, Opc.EncodingID); in emitSingletonTableEntry()
1542 insn_t Insn; in filterProcessor() local
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/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DInstructionPrecedenceTracking.h62 bool isPreceededBySpecialInstruction(const Instruction *Insn);
69 virtual bool isSpecialInstruction(const Instruction *Insn) const = 0;
114 bool isDominatedByICFIFromSameBlock(const Instruction *Insn) { in isDominatedByICFIFromSameBlock() argument
115 return isPreceededBySpecialInstruction(Insn); in isDominatedByICFIFromSameBlock()
118 bool isSpecialInstruction(const Instruction *Insn) const override;
137 bool isDominatedByMemoryWriteFromSameBlock(const Instruction *Insn) { in isDominatedByMemoryWriteFromSameBlock() argument
138 return isPreceededBySpecialInstruction(Insn); in isDominatedByMemoryWriteFromSameBlock()
141 bool isSpecialInstruction(const Instruction *Insn) const override;
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/Disassembler/
H A DRISCVDisassembler.cpp382 uint32_t Rd = fieldFromInstruction(Insn, 7, 5); in decodeRVCInstrRdRs1ImmZero()
394 uint32_t Rs1 = fieldFromInstruction(Insn, 7, 5); in decodeCSSPushPopchk()
406 fieldFromInstruction(Insn, 12, 1) << 5 | fieldFromInstruction(Insn, 2, 5); in decodeRVCInstrRdSImm()
419 fieldFromInstruction(Insn, 12, 1) << 5 | fieldFromInstruction(Insn, 2, 5); in decodeRVCInstrRdRs1UImm()
429 uint32_t Rd = fieldFromInstruction(Insn, 7, 5); in decodeRVCInstrRdRs2()
430 uint32_t Rs2 = fieldFromInstruction(Insn, 2, 5); in decodeRVCInstrRdRs2()
439 uint32_t Rd = fieldFromInstruction(Insn, 7, 5); in decodeRVCInstrRdRs1Rs2()
440 uint32_t Rs2 = fieldFromInstruction(Insn, 2, 5); in decodeRVCInstrRdRs1Rs2()
450 uint32_t Rd1 = fieldFromInstruction(Insn, 7, 5); in decodeXTHeadMemPair()
511 uint32_t Insn; in getInstruction() local
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/BPF/Disassembler/
H A DBPFDisassembler.cpp126 static DecodeStatus decodeMemoryOpValue(MCInst &Inst, unsigned Insn, in decodeMemoryOpValue() argument
129 unsigned Register = (Insn >> 16) & 0xf; in decodeMemoryOpValue()
134 unsigned Offset = (Insn & 0xffff); in decodeMemoryOpValue()
142 uint64_t &Size, uint64_t &Insn, in readInstruction64() argument
160 Insn = Make_64(Hi, Lo); in readInstruction64()
170 uint64_t Insn, Hi; in getInstruction() local
173 Result = readInstruction64(Bytes, Address, Size, Insn, IsLittleEndian); in getInstruction()
176 uint8_t InstClass = getInstClass(Insn); in getInstruction()
177 uint8_t InstMode = getInstMode(Insn); in getInstruction()
179 getInstSize(Insn) != BPF_DW && in getInstruction()
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/freebsd-14.2/tests/atf_python/sys/netpfil/ipfw/
H A Dinsns.py186 class Insn(BaseInsn): class
207 class InsnUnknown(Insn):
225 class InsnEmpty(Insn):
237 class InsnComment(Insn):
276 class InsnProto(Insn):
289 class InsnU32(Insn):
356 class InsnTable(Insn):
385 class InsnReject(Insn):
421 class InsnPorts(Insn):
471 class InsnIp6(Insn):
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/freebsd-14.2/contrib/llvm-project/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/
H A DRuntimeDyldELFMips.cpp215 uint32_t Insn = readBytesUnaligned(TargetPtr, 4); in applyMIPSRelocation() local
233 Insn = (Insn & 0xffff0000) | (Value & 0x0000ffff); in applyMIPSRelocation()
234 writeBytesUnaligned(Insn, TargetPtr, 4); in applyMIPSRelocation()
237 Insn = (Insn & 0xfffc0000) | (Value & 0x0003ffff); in applyMIPSRelocation()
238 writeBytesUnaligned(Insn, TargetPtr, 4); in applyMIPSRelocation()
241 Insn = (Insn & 0xfff80000) | (Value & 0x0007ffff); in applyMIPSRelocation()
242 writeBytesUnaligned(Insn, TargetPtr, 4); in applyMIPSRelocation()
245 Insn = (Insn & 0xffe00000) | (Value & 0x001fffff); in applyMIPSRelocation()
246 writeBytesUnaligned(Insn, TargetPtr, 4); in applyMIPSRelocation()
250 Insn = (Insn & 0xfc000000) | (Value & 0x03ffffff); in applyMIPSRelocation()
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H A DRuntimeDyldMachOARM.h271 uint32_t Insn = readBytesUnaligned(LocalAddress, 4); in resolveRelocation() local
274 Insn = (Insn & 0x8f00fbf0) | ((Value & 0xf000) >> 12) | in resolveRelocation()
278 Insn = (Insn & 0xfff0f000) | ((Value & 0xf000) << 4) | (Value & 0x0fff); in resolveRelocation()
279 writeBytesUnaligned(Insn, LocalAddress, 4); in resolveRelocation()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/M68k/Disassembler/
H A DM68kDisassembler.cpp108 static DecodeStatus DecodeCCRCRegisterClass(MCInst &Inst, APInt &Insn, in DecodeCCRCRegisterClass() argument
143 auto MakeUp = [&](APInt &Insn, unsigned InstrBits) { in getInstruction() argument
144 unsigned Idx = Insn.getBitWidth() >> 3; in getInstruction()
146 if (RoundUp > Insn.getBitWidth()) in getInstruction()
147 Insn = Insn.zext(RoundUp); in getInstruction()
150 Insn.insertBits(support::endian::read16be(&Bytes[Idx]), Idx * 8, 16); in getInstruction()
153 APInt Insn(16, support::endian::read16be(Bytes.data())); in getInstruction() local
158 Result = decodeInstruction(DecoderTable80, Instr, Insn, Address, this, STI, in getInstruction()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/Disassembler/
H A DX86Disassembler.cpp1810 InternalInstruction Insn; in getInstruction() local
1812 Insn.bytes = Bytes; in getInstruction()
1815 Insn.mode = fMode; in getInstruction()
1817 if (Bytes.empty() || readPrefixes(&Insn) || readOpcode(&Insn) || in getInstruction()
1818 getInstructionID(&Insn, MII.get()) || Insn.instructionID == 0 || in getInstruction()
1819 readOperands(&Insn)) { in getInstruction()
1824 Insn.operands = x86OperandSets[Insn.spec->operands]; in getInstruction()
1825 Insn.length = Insn.readerCursor - Insn.startLocation; in getInstruction()
1826 Size = Insn.length; in getInstruction()
1833 if (Insn.hasAdSize) in getInstruction()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Sparc/Disassembler/
H A DSparcDisassembler.cpp271 uint64_t &Size, uint32_t &Insn, in readInstruction32() argument
279 Insn = IsLittleEndian in readInstruction32()
292 uint32_t Insn; in getInstruction() local
295 readInstruction32(Bytes, Address, Size, Insn, isLittleEndian); in getInstruction()
303 Result = decodeInstruction(DecoderTableSparcV932, Instr, Insn, Address, this, STI); in getInstruction()
307 Result = decodeInstruction(DecoderTableSparcV832, Instr, Insn, Address, this, STI); in getInstruction()
315 decodeInstruction(DecoderTableSparc32, Instr, Insn, Address, this, STI); in getInstruction()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Xtensa/Disassembler/
H A DXtensaDisassembler.cpp248 uint64_t &Size, uint32_t &Insn, in readInstruction24() argument
259 Insn = (Bytes[2] << 16) | (Bytes[1] << 8) | (Bytes[0] << 0); in readInstruction24()
272 uint32_t Insn; in getInstruction() local
275 Result = readInstruction24(Bytes, Address, Size, Insn, IsLittleEndian); in getInstruction()
279 Result = decodeInstruction(DecoderTable24, MI, Insn, Address, this, STI); in getInstruction()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/LoongArch/Disassembler/
H A DLoongArchDisassembler.cpp156 uint32_t Insn; in getInstruction() local
166 Insn = support::endian::read32le(Bytes.data()); in getInstruction()
168 Result = decodeInstruction(DecoderTable32, MI, Insn, Address, this, STI); in getInstruction()

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