Lines Matching refs:Insn

340 static DecodeStatus decodeRVCInstrRdRs1ImmZero(MCInst &Inst, uint32_t Insn,
344 static DecodeStatus decodeRVCInstrRdSImm(MCInst &Inst, uint32_t Insn,
348 static DecodeStatus decodeRVCInstrRdRs1UImm(MCInst &Inst, uint32_t Insn,
352 static DecodeStatus decodeRVCInstrRdRs2(MCInst &Inst, uint32_t Insn,
356 static DecodeStatus decodeRVCInstrRdRs1Rs2(MCInst &Inst, uint32_t Insn,
360 static DecodeStatus decodeXTHeadMemPair(MCInst &Inst, uint32_t Insn,
367 static DecodeStatus decodeRegReg(MCInst &Inst, uint32_t Insn, uint64_t Address,
373 static DecodeStatus decodeCSSPushPopchk(MCInst &Inst, uint32_t Insn,
379 static DecodeStatus decodeRVCInstrRdRs1ImmZero(MCInst &Inst, uint32_t Insn, in decodeRVCInstrRdRs1ImmZero() argument
382 uint32_t Rd = fieldFromInstruction(Insn, 7, 5); in decodeRVCInstrRdRs1ImmZero()
391 static DecodeStatus decodeCSSPushPopchk(MCInst &Inst, uint32_t Insn, in decodeCSSPushPopchk() argument
394 uint32_t Rs1 = fieldFromInstruction(Insn, 7, 5); in decodeCSSPushPopchk()
401 static DecodeStatus decodeRVCInstrRdSImm(MCInst &Inst, uint32_t Insn, in decodeRVCInstrRdSImm() argument
406 fieldFromInstruction(Insn, 12, 1) << 5 | fieldFromInstruction(Insn, 2, 5); in decodeRVCInstrRdSImm()
413 static DecodeStatus decodeRVCInstrRdRs1UImm(MCInst &Inst, uint32_t Insn, in decodeRVCInstrRdRs1UImm() argument
419 fieldFromInstruction(Insn, 12, 1) << 5 | fieldFromInstruction(Insn, 2, 5); in decodeRVCInstrRdRs1UImm()
426 static DecodeStatus decodeRVCInstrRdRs2(MCInst &Inst, uint32_t Insn, in decodeRVCInstrRdRs2() argument
429 uint32_t Rd = fieldFromInstruction(Insn, 7, 5); in decodeRVCInstrRdRs2()
430 uint32_t Rs2 = fieldFromInstruction(Insn, 2, 5); in decodeRVCInstrRdRs2()
436 static DecodeStatus decodeRVCInstrRdRs1Rs2(MCInst &Inst, uint32_t Insn, in decodeRVCInstrRdRs1Rs2() argument
439 uint32_t Rd = fieldFromInstruction(Insn, 7, 5); in decodeRVCInstrRdRs1Rs2()
440 uint32_t Rs2 = fieldFromInstruction(Insn, 2, 5); in decodeRVCInstrRdRs1Rs2()
447 static DecodeStatus decodeXTHeadMemPair(MCInst &Inst, uint32_t Insn, in decodeXTHeadMemPair() argument
450 uint32_t Rd1 = fieldFromInstruction(Insn, 7, 5); in decodeXTHeadMemPair()
451 uint32_t Rs1 = fieldFromInstruction(Insn, 15, 5); in decodeXTHeadMemPair()
452 uint32_t Rd2 = fieldFromInstruction(Insn, 20, 5); in decodeXTHeadMemPair()
453 uint32_t UImm2 = fieldFromInstruction(Insn, 25, 2); in decodeXTHeadMemPair()
481 static DecodeStatus decodeRegReg(MCInst &Inst, uint32_t Insn, uint64_t Address, in decodeRegReg() argument
483 uint32_t Rs1 = fieldFromInstruction(Insn, 0, 5); in decodeRegReg()
484 uint32_t Rs2 = fieldFromInstruction(Insn, 5, 5); in decodeRegReg()
511 uint32_t Insn; in getInstruction() local
519 Result = decodeInstruction(DECODER_TABLE, MI, Insn, Address, this, STI); \ in getInstruction()
543 Insn = support::endian::read32le(Bytes.data()); in getInstruction()
624 Insn = support::endian::read16le(Bytes.data()); in getInstruction()