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Searched refs:Imm (Results 1 – 25 of 369) sorted by relevance

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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64AddressingModes.h124 assert((Imm & 0x7) == Imm && "invalid immediate!"); in getExtendType()
215 if (Imm == 0ULL || Imm == ~0ULL || in processLogicalImmediate()
227 if ((Imm & Mask) != ((Imm >> Size) & Mask)) { in processLogicalImmediate()
452 return ((Imm >> 32) == (Imm & 0xffffffffULL)) && in isAdvSIMDModImmType1()
467 return ((Imm >> 32) == (Imm & 0xffffffffULL)) && in isAdvSIMDModImmType2()
482 return ((Imm >> 32) == (Imm & 0xffffffffULL)) && in isAdvSIMDModImmType3()
576 ((Imm >> 56) == (Imm & 0x000000ffULL)); in isAdvSIMDModImmType9()
789 if ((Imm & Mask) != 0 && (Imm & Mask) != Mask) in isSVECpyImm()
795 return int8_t(Imm) == T(Imm); in isSVECpyImm()
800 return int16_t(Imm) == T(Imm); in isSVECpyImm()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMAddressingModes.h106 inline unsigned getSOImmValImm(unsigned Imm) { return Imm & 0xFF; } in getSOImmValImm() argument
109 inline unsigned getSOImmValRot(unsigned Imm) { return (Imm >> 8) * 2; } in getSOImmValRot() argument
133 if (Imm & 63U) { in getSOImmValRotate()
263 unsigned u, Vs, Imm; in getT2SOImmValSplatVal() local
271 Imm = Vs & 0xff; in getT2SOImmValSplatVal()
273 u = Imm | (Imm << 16); in getT2SOImmValSplatVal()
329 unsigned V = Imm; in isT2SOImmTwoPartVal()
343 V = Imm; in isT2SOImmTwoPartVal()
359 unsigned V = llvm::rotr<uint32_t>(~255, getT2SOImmValRotate(Imm)) & Imm; in getT2SOImmTwoPartFirst()
374 Imm ^= getT2SOImmTwoPartFirst(Imm); in getT2SOImmTwoPartSecond()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Xtensa/Disassembler/
H A DXtensaDisassembler.cpp108 assert(isUInt<18>(Imm) && "Invalid immediate"); in decodeCallOperand()
115 assert(isUInt<18>(Imm) && "Invalid immediate"); in decodeJumpOperand()
152 assert(isUInt<8>(Imm) && "Invalid immediate"); in decodeImm8Operand()
160 assert(isUInt<8>(Imm) && "Invalid immediate"); in decodeImm8_sh8Operand()
174 assert(isUInt<4>(Imm) && "Invalid immediate"); in decodeUimm4Operand()
175 Inst.addOperand(MCOperand::createImm(Imm)); in decodeUimm4Operand()
181 assert(isUInt<5>(Imm) && "Invalid immediate"); in decodeUimm5Operand()
182 Inst.addOperand(MCOperand::createImm(Imm)); in decodeUimm5Operand()
188 assert(isUInt<4>(Imm) && "Invalid immediate"); in decodeImm1_16Operand()
196 assert(isUInt<5>(Imm) && "Invalid immediate"); in decodeShimm1_31Operand()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/Disassembler/
H A DSystemZDisassembler.cpp183 if (!isUInt<N>(Imm)) in decodeUImmOperand()
191 if (!isUInt<N>(Imm)) in decodeSImmOperand()
200 return decodeUImmOperand<1>(Inst, Imm); in decodeU1ImmOperand()
206 return decodeUImmOperand<2>(Inst, Imm); in decodeU2ImmOperand()
212 return decodeUImmOperand<3>(Inst, Imm); in decodeU3ImmOperand()
218 return decodeUImmOperand<4>(Inst, Imm); in decodeU4ImmOperand()
224 return decodeUImmOperand<8>(Inst, Imm); in decodeU8ImmOperand()
230 return decodeUImmOperand<12>(Inst, Imm); in decodeU12ImmOperand()
236 return decodeUImmOperand<16>(Inst, Imm); in decodeU16ImmOperand()
248 return decodeSImmOperand<8>(Inst, Imm); in decodeS8ImmOperand()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsAnalyzeImmediate.cpp35 AddInstr(SeqLs, Inst(ADDiu, Imm & 0xffffULL)); in GetInstSeqLsADDiu()
41 AddInstr(SeqLs, Inst(ORi, Imm & 0xffffULL)); in GetInstSeqLsORi()
46 unsigned Shamt = llvm::countr_zero(Imm); in GetInstSeqLsSLL()
66 if (!(Imm & 0xffff)) { in GetInstSeqLs()
67 GetInstSeqLsSLL(Imm, RemSize, SeqLs); in GetInstSeqLs()
71 GetInstSeqLsADDiu(Imm, RemSize, SeqLs); in GetInstSeqLs()
75 if (Imm & 0x8000) { in GetInstSeqLs()
77 GetInstSeqLsORi(Imm, RemSize, SeqLsORi); in GetInstSeqLs()
148 if (LastInstrIsADDiu | !Imm) in Analyze()
149 GetInstSeqLsADDiu(Imm, Size, SeqLs); in Analyze()
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H A DMipsISelDAGToDAG.h97 virtual bool selectVSplat(SDNode *N, APInt &Imm,
100 virtual bool selectVSplatUimm1(SDValue N, SDValue &Imm) const;
102 virtual bool selectVSplatUimm2(SDValue N, SDValue &Imm) const;
104 virtual bool selectVSplatUimm3(SDValue N, SDValue &Imm) const;
106 virtual bool selectVSplatUimm4(SDValue N, SDValue &Imm) const;
108 virtual bool selectVSplatUimm5(SDValue N, SDValue &Imm) const;
110 virtual bool selectVSplatUimm6(SDValue N, SDValue &Imm) const;
112 virtual bool selectVSplatUimm8(SDValue N, SDValue &Imm) const;
114 virtual bool selectVSplatSimm5(SDValue N, SDValue &Imm) const;
122 virtual bool selectVSplatMaskL(SDValue N, SDValue &Imm) const;
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H A DMipsSEISelDAGToDAG.h96 bool selectVSplat(SDNode *N, APInt &Imm,
99 bool selectVSplatCommon(SDValue N, SDValue &Imm, bool Signed,
102 bool selectVSplatUimm1(SDValue N, SDValue &Imm) const override;
104 bool selectVSplatUimm2(SDValue N, SDValue &Imm) const override;
106 bool selectVSplatUimm3(SDValue N, SDValue &Imm) const override;
108 bool selectVSplatUimm4(SDValue N, SDValue &Imm) const override;
110 bool selectVSplatUimm5(SDValue N, SDValue &Imm) const override;
112 bool selectVSplatUimm6(SDValue N, SDValue &Imm) const override;
114 bool selectVSplatUimm8(SDValue N, SDValue &Imm) const override;
116 bool selectVSplatSimm5(SDValue N, SDValue &Imm) const override;
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H A DMipsISelDAGToDAG.cpp157 bool MipsDAGToDAGISel::selectVSplat(SDNode *N, APInt &Imm, in selectVSplat() argument
163 bool MipsDAGToDAGISel::selectVSplatUimm1(SDValue N, SDValue &Imm) const { in selectVSplatUimm1()
168 bool MipsDAGToDAGISel::selectVSplatUimm2(SDValue N, SDValue &Imm) const { in selectVSplatUimm2()
173 bool MipsDAGToDAGISel::selectVSplatUimm3(SDValue N, SDValue &Imm) const { in selectVSplatUimm3()
178 bool MipsDAGToDAGISel::selectVSplatUimm4(SDValue N, SDValue &Imm) const { in selectVSplatUimm4()
183 bool MipsDAGToDAGISel::selectVSplatUimm5(SDValue N, SDValue &Imm) const { in selectVSplatUimm5()
188 bool MipsDAGToDAGISel::selectVSplatUimm6(SDValue N, SDValue &Imm) const { in selectVSplatUimm6()
193 bool MipsDAGToDAGISel::selectVSplatUimm8(SDValue N, SDValue &Imm) const { in selectVSplatUimm8()
198 bool MipsDAGToDAGISel::selectVSplatSimm5(SDValue N, SDValue &Imm) const { in selectVSplatSimm5()
213 bool MipsDAGToDAGISel::selectVSplatMaskL(SDValue N, SDValue &Imm) const { in selectVSplatMaskL()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUInstPrinter.cpp63 if (isInt<16>(Imm) || isUInt<16>(Imm)) in printU16ImmOperand()
101 if (Imm != 0) { in printOffset()
118 if (Imm != 0) { in printFlatOffset()
617 assert(isUInt<32>(Imm) || isInt<32>(Imm)); in printImmediate64()
629 if (!Imm) in printBLGP()
651 if (!Imm) in printCBSZ()
661 if (!Imm) in printABID()
1111 if (Imm) { in printDppBoundCtrl()
1120 if (Imm == DPP_FI_1 || Imm == DPP8_FI_1) { in printDppFI()
1370 if (Imm == 0) in printIndexKey8bit()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaOperands.td26 def imm8 : Immediate<i32, [{ return Imm >= -128 && Imm <= 127; }], "Imm8_AsmOperand"> {
34 def imm8_sh8 : Immediate<i32, [{ return Imm >= -32768 && Imm <= 32512 && ((Imm & 0xFF) == 0); }],
42 def imm12 : Immediate<i32, [{ return Imm >= -2048 && Imm <= 2047; }], "Imm12_AsmOperand"> {
56 def uimm4 : Immediate<i32, [{ return Imm >= 0 && Imm <= 15; }], "Uimm4_AsmOperand"> {
63 def uimm5 : Immediate<i32, [{ return Imm >= 0 && Imm <= 31; }], "Uimm5_AsmOperand"> {
85 [{ return Imm >= 0 && Imm <= 255; }],
91 [{ return Imm >= 0 && Imm <= 510 && (Imm & 0x1 == 0); }],
97 [{ return Imm >= 0 && Imm <= 1020 && (Imm & 0x3 == 0); }],
103 [{ return Imm >= 0 && Imm <= 60 && (Imm & 0x3 == 0); }],
109 [{ switch (Imm) {
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ExpandImm.cpp25 return (Imm >> (ChunkIdx * 16)) & 0xFFFF; in getChunk()
129 Imm &= ~(Mask << (Idx * 16)); in updateImm()
132 Imm |= Mask << (Idx * 16); in updateImm()
134 return Imm; in updateImm()
383 if ((Imm & Mask) != ((Imm >> BigSize) & Mask)) { in tryEorOfLogicalImmediates()
394 uint64_t RunStarts = Imm & ~rotl<uint64_t>(Imm, 1); in tryEorOfLogicalImmediates()
480 Imm = ~Imm; in expandMOVImmSimple()
485 Imm &= (1LL << 32) - 1; in expandMOVImmSimple()
492 if (Imm != 0) { in expandMOVImmSimple()
509 Imm = ~Imm; in expandMOVImmSimple()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/NVPTX/MCTargetDesc/
H A DNVPTXInstPrinter.cpp95 int64_t Imm = MO.getImm(); in printCvtMode() local
99 if (Imm & NVPTX::PTXCvtMode::FTZ_FLAG) in printCvtMode()
103 if (Imm & NVPTX::PTXCvtMode::SAT_FLAG) in printCvtMode()
152 int64_t Imm = MO.getImm(); in printCmpMode() local
226 int Imm = (int) MO.getImm(); in printLdStCode() local
228 if (Imm) in printLdStCode()
231 switch (Imm) { in printLdStCode()
277 int Imm = (int)MO.getImm(); in printMmaCode() local
282 if (Imm >= 63) in printMmaCode()
316 int64_t Imm = MO.getImm(); in printPrmtMode() local
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86ShuffleDecode.h31 void DecodeINSERTPSMask(unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
52 void DecodePSLLDQMask(unsigned NumElts, unsigned Imm,
55 void DecodePSRLDQMask(unsigned NumElts, unsigned Imm,
58 void DecodePALIGNRMask(unsigned NumElts, unsigned Imm,
61 void DecodeVALIGNMask(unsigned NumElts, unsigned Imm,
65 void DecodePSHUFMask(unsigned NumElts, unsigned ScalarBits, unsigned Imm,
69 void DecodePSHUFHWMask(unsigned NumElts, unsigned Imm,
73 void DecodePSHUFLWMask(unsigned NumElts, unsigned Imm,
104 void DecodeBLENDMask(unsigned NumElts, unsigned Imm,
107 void DecodeVPERM2X128Mask(unsigned NumElts, unsigned Imm,
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H A DX86ShuffleDecode.cpp34 unsigned ZMask = Imm & 15; in DecodeINSERTPSMask()
35 unsigned CountD = (Imm >> 4) & 3; in DecodeINSERTPSMask()
36 unsigned CountS = (Imm >> 6) & 3; in DecodeINSERTPSMask()
106 if (i >= Imm) M = i - Imm + l; in DecodePSLLDQMask()
117 unsigned Base = i + Imm; in DecodePSRLDQMask()
130 unsigned Base = i + Imm; in DecodePALIGNRMask()
142 Imm = Imm & (NumElts - 1); in DecodeVALIGNMask()
144 ShuffleMask.push_back(i + Imm); in DecodeVALIGNMask()
166 unsigned NewImm = Imm; in DecodePSHUFHWMask()
180 unsigned NewImm = Imm; in DecodePSHUFLWMask()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/CSKY/Disassembler/
H A DCSKYDisassembler.cpp247 if ((Imm >> 7) & 0x1) { in decodeLRW16Imm8()
262 if (Imm == 0) in decodeJMPIXImmOperand()
264 else if (Imm == 1) in decodeJMPIXImmOperand()
266 else if (Imm == 2) in decodeJMPIXImmOperand()
268 else if (Imm == 3) in decodeJMPIXImmOperand()
281 auto Imm5 = Imm & 0x1f; in DecodeRegSeqOperand()
282 auto Ry = (Imm >> 5) & 0x1f; in DecodeRegSeqOperand()
298 auto Imm5 = Imm & 0x1f; in DecodeRegSeqOperandF1()
315 auto Imm5 = Imm & 0x1f; in DecodeRegSeqOperandD1()
332 auto Imm5 = Imm & 0x1f; in DecodeRegSeqOperandF2()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/Disassembler/
H A DPPCDisassembler.cpp68 Inst.addOperand(MCOperand::createImm(SignExtend32<14>(Imm))); in decodeCondBrTarget()
75 int32_t Offset = SignExtend32<24>(Imm); in decodeDirectBrTarget()
251 if (!isUInt<N>(Imm)) in decodeUImmOperand()
253 Inst.addOperand(MCOperand::createImm(Imm)); in decodeUImmOperand()
261 if (!isUInt<N>(Imm)) in decodeSImmOperand()
270 if (Imm != 0) in decodeImmZeroOperand()
272 Inst.addOperand(MCOperand::createImm(Imm)); in decodeImmZeroOperand()
319 uint64_t Disp = Imm & 0x1F; in decodeDispSPE8Operand()
330 uint64_t Disp = Imm & 0x1F; in decodeDispSPE4Operand()
341 uint64_t Disp = Imm & 0x1F; in decodeDispSPE2Operand()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/AsmParser/
H A DRISCVAsmParser.cpp390 ImmOp Imm; member
413 Imm = o.Imm; in RISCVOperand()
502 int64_t Imm; in isBareSimmNLsb0() local
518 int64_t Imm; in isBareSymbol() local
654 return (isRV64Imm() && isUInt<6>(Imm)) || isUInt<5>(Imm); in isUImmLog2XLen()
667 return (isRV64Imm() && isUInt<6>(Imm)) || isUInt<5>(Imm); in isUImmLog2XLenNonZero()
678 return (isRV64Imm() && isUInt<5>(Imm)) || isUInt<4>(Imm); in isUImmLog2XLenHalf()
706 return IsConstantImm && isUInt<8>(Imm) && Imm >= 32 && in isUImm8GE32()
788 (isUInt<5>(Imm) || (Imm >= 0xfffe0 && Imm <= 0xfffff)) && in isCLUIImm()
1795 if (Imm >= 0 && Imm <= 2) { in parseInsnCDirectiveOpcode()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiTargetTransformInfo.h52 InstructionCost getIntImmCost(const APInt &Imm, Type *Ty, in getIntImmCost() argument
65 if (Imm == 0) in getIntImmCost()
67 if (isInt<16>(Imm.getSExtValue())) in getIntImmCost()
69 if (isInt<21>(Imm.getZExtValue())) in getIntImmCost()
71 if (isInt<32>(Imm.getSExtValue())) { in getIntImmCost()
72 if ((Imm.getSExtValue() & 0xFFFF) == 0) in getIntImmCost()
81 const APInt &Imm, Type *Ty,
84 return getIntImmCost(Imm, Ty, CostKind);
88 const APInt &Imm, Type *Ty, in getIntImmCostIntrin() argument
90 return getIntImmCost(Imm, Ty, CostKind); in getIntImmCostIntrin()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/BPF/MCTargetDesc/
H A DBPFInstPrinter.cpp81 auto Imm = OffsetOp.getImm(); in printMemOperand() local
82 if (Imm >= 0) in printMemOperand()
83 O << " + " << formatImm(Imm); in printMemOperand()
85 O << " - " << formatImm(-Imm); in printMemOperand()
107 int32_t Imm = Op.getImm(); in printBrTargetOperand() local
108 O << ((Imm >= 0) ? "+" : "") << formatImm(Imm); in printBrTargetOperand()
110 int16_t Imm = Op.getImm(); in printBrTargetOperand() local
111 O << ((Imm >= 0) ? "+" : "") << formatImm(Imm); in printBrTargetOperand()
/freebsd-14.2/contrib/llvm-project/compiler-rt/lib/xray/
H A Dxray_hexagon.cpp43 encodeExtendedTransferImmediate(uint32_t Imm, RegNum DestReg, in encodeExtendedTransferImmediate() argument
49 Imm = Imm & 0x03f; in encodeExtendedTransferImmediate()
52 return PO_TFR_IMM | ParseBits | (Imm << 5) | (DestReg & REG_MASK); in encodeExtendedTransferImmediate()
56 encodeConstantExtender(uint32_t Imm) XRAY_NEVER_INSTRUMENT { in encodeConstantExtender() argument
68 Imm = Imm >> 6; in encodeConstantExtender()
70 const uint32_t high = (Imm & IMM_MASK_HIGH) << 16; in encodeConstantExtender()
71 const uint32_t low = Imm & IMM_MASK_LOW; in encodeConstantExtender()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVInstPrinter.cpp123 unsigned Imm = MI->getOperand(OpNo).getImm(); in printCSRSystemRegister() local
174 unsigned Imm = MI->getOperand(OpNo).getImm(); in printFPImmOperand() local
175 if (Imm == 1) { in printFPImmOperand()
177 } else if (Imm == 30) { in printFPImmOperand()
179 } else if (Imm == 31) { in printFPImmOperand()
211 RISCVVType::getSEW(Imm) > 64 || (Imm >> 8) != 0) { in printVTypeI()
212 O << formatImm(Imm); in printVTypeI()
216 RISCVVType::printVType(Imm, O); in printVTypeI()
223 switch (Imm) { in printRlist()
297 int64_t Imm = MI->getOperand(OpNo).getImm(); in printSpimm() local
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/Disassembler/
H A DRISCVDisassembler.cpp274 assert(isUInt<N>(Imm) && "Invalid immediate"); in decodeUImmOperand()
275 Inst.addOperand(MCOperand::createImm(Imm)); in decodeUImmOperand()
283 if (Imm == 0) in decodeUImmNonZeroOperand()
302 if (Imm == 0) in decodeSImmNonZeroOperand()
323 if (Imm > 31) { in decodeCLUIImmOperand()
324 Imm = (SignExtend64<6>(Imm) & 0xfffff); in decodeCLUIImmOperand()
326 Inst.addOperand(MCOperand::createImm(Imm)); in decodeCLUIImmOperand()
336 Inst.addOperand(MCOperand::createImm(Imm)); in decodeFRMArg()
475 if (Imm <= 3) in decodeZcmpRlist()
477 Inst.addOperand(MCOperand::createImm(Imm)); in decodeZcmpRlist()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/
H A DPPCInstructionSelector.cpp296 uint32_t Hi32 = Hi_32(Imm); in selectI64ImmDirect()
297 uint32_t Lo32 = Lo_32(Imm); in selectI64ImmDirect()
304 if (isInt<16>(Imm)) in selectI64ImmDirect()
306 .addImm(Imm) in selectI64ImmDirect()
312 .addImm((Imm >> 16) & 0xffff) in selectI64ImmDirect()
322 if (isInt<32>(Imm)) { in selectI64ImmDirect()
327 .addImm((Imm >> 16) & 0xffff) in selectI64ImmDirect()
332 .addImm(Imm & 0xffff) in selectI64ImmDirect()
344 .addImm((Imm >> TZ) & 0xffff) in selectI64ImmDirect()
403 .addImm((Imm >> TO) & 0xffff) in selectI64ImmDirect()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp97 Offset = Imm & 0xFFFFF; in decodeSMEMOffset()
292 bool IsHi = Imm & (1 << 9); in DECODE_OPERAND_REG_8()
293 unsigned RegIdx = Imm & 0xff; in DECODE_OPERAND_REG_8()
303 bool IsHi = Imm & (1 << 7); in DecodeVGPR_16_Lo128RegisterClass()
373 Imm &= 511; in decodeOperand_AVLdSt_Any()
389 Imm |= 512; in decodeOperand_AVLdSt_Any()
396 Imm |= 512; in decodeOperand_AVLdSt_Any()
1370 assert(Imm >= INLINE_INTEGER_C_MIN && Imm <= INLINE_INTEGER_C_MAX); in decodeIntImmed()
1378 switch (Imm) { in getInlineImmVal32()
1403 switch (Imm) { in getInlineImmVal64()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/Disassembler/
H A DAArch64Disassembler.cpp881 Imm |= 0x20; in DecodeFixedPointScaleImm32()
898 uint64_t ImmVal = Imm; in DecodePCRelLabel16()
911 int64_t ImmVal = Imm; in DecodePCRelLabel19()
1023 return DecodeVecShiftRImm(Inst, Imm, 8); in DecodeVecShiftR8Imm()
1824 unsigned ShifterVal = (Imm >> 12) & 3; in DecodeAddSubImmShift()
1825 unsigned ImmVal = Imm & 0xFFF; in DecodeAddSubImmShift()
2005 if (Imm & ~((1LL << Bits) - 1)) in DecodeSImm()
2009 if (Imm & (1 << (Bits - 1))) in DecodeSImm()
2010 Imm |= ~((1LL << Bits) - 1); in DecodeSImm()
2020 unsigned Val = (uint8_t)Imm; in DecodeImm8OptLsl()
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