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Searched refs:DestSub0 (Results 1 – 3 of 3) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.cpp7680 Register DestSub0 = MRI.createVirtualRegister(NewDestSubRC); in splitScalar64BitUnaryOp() local
7690 std::swap(DestSub0, DestSub1); in splitScalar64BitUnaryOp()
7694 .addReg(DestSub0) in splitScalar64BitUnaryOp()
7720 Register DestSub0 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in splitScalarSMulU64() local
7785 BuildMI(MBB, MII, DL, get(AMDGPU::V_MUL_LO_U32_e64), DestSub0) in splitScalarSMulU64()
7800 .addReg(DestSub0) in splitScalarSMulU64()
7864 BuildMI(MBB, MII, DL, get(AMDGPU::V_MUL_LO_U32_e64), DestSub0) in splitScalarSMulPseudo()
7869 .addReg(DestSub0) in splitScalarSMulPseudo()
7926 Register DestSub0 = MRI.createVirtualRegister(NewDestSubRC); in splitScalar64BitBinaryOp() local
7927 MachineInstr &LoHalf = *BuildMI(MBB, MII, DL, InstDesc, DestSub0) in splitScalar64BitBinaryOp()
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H A DSILoadStoreOptimizer.cpp1985 Register DestSub0 = MRI->createVirtualRegister(&AMDGPU::VGPR_32RegClass); in computeBase() local
1988 BuildMI(*MBB, MBBI, DL, TII->get(AMDGPU::V_ADD_CO_U32_e64), DestSub0) in computeBase()
2009 .addReg(DestSub0) in computeBase()
H A DSIISelLowering.cpp4766 Register DestSub0 = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass); in EmitInstrWithCustomInserter() local
4781 BuildMI(*BB, MI, DL, TII->get(LoOpc), DestSub0) in EmitInstrWithCustomInserter()
4788 .addReg(DestSub0) in EmitInstrWithCustomInserter()
4822 Register DestSub0 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in EmitInstrWithCustomInserter() local
4851 MachineInstr *LoHalf = BuildMI(*BB, MI, DL, TII->get(LoOpc), DestSub0) in EmitInstrWithCustomInserter()
4867 .addReg(DestSub0) in EmitInstrWithCustomInserter()