| /freebsd-14.2/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | VectorUtils.cpp | 312 APInt &DemandedRHS, bool AllowUndefElts) { in getShuffleDemandedElts() argument
313 DemandedLHS = DemandedRHS = APInt::getZero(SrcWidth); in getShuffleDemandedElts()
341 DemandedRHS.setBit(M - SrcWidth); in getShuffleDemandedElts()
|
| H A D | ValueTracking.cpp | 136 APInt &DemandedLHS, APInt &DemandedRHS) { in getShuffleDemandedElts() argument
139 DemandedLHS = DemandedRHS = DemandedElts; in getShuffleDemandedElts()
1592 APInt DemandedLHS, DemandedRHS; in computeKnownBitsFromOperator() local
1606 if (!!DemandedRHS) { in computeKnownBitsFromOperator()
1608 computeKnownBits(RHS, DemandedRHS, Known2, Depth + 1, Q); in computeKnownBitsFromOperator()
3537 APInt DemandedLHS, DemandedRHS; in ComputeNumSignBitsImpl() local
3551 if (!!DemandedRHS) { in ComputeNumSignBitsImpl()
3553 Tmp2 = ComputeNumSignBits(RHS, DemandedRHS, Depth + 1, Q); in ComputeNumSignBitsImpl()
5190 APInt DemandedLHS, DemandedRHS; in computeKnownFPClass() local
5207 if (!!DemandedRHS) { in computeKnownFPClass()
[all …]
|
| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/Analysis/ |
| H A D | VectorUtils.h | 192 APInt &DemandedRHS, bool AllowUndefElts = false);
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineSimplifyDemanded.cpp | 1680 APInt DemandedLHS(DemandedElts), DemandedRHS(DemandedElts); in SimplifyDemandedVectorElts() local
1694 DemandedRHS.clearBit(i); in SimplifyDemandedVectorElts()
1699 simplifyAndSetOp(I, 2, DemandedRHS, PoisonElts3); in SimplifyDemandedVectorElts()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAG.cpp | 2781 APInt DemandedRHS = APInt::getZero(NumElts); in isSplatValue() local
2794 DemandedRHS.setBit(M - NumElts); in isSplatValue()
2799 if ((DemandedLHS.isZero() && DemandedRHS.isZero()) || in isSplatValue()
2800 (!DemandedLHS.isZero() && !DemandedRHS.isZero())) in isSplatValue()
2814 return CheckSplatSrc(V.getOperand(1), DemandedRHS); in isSplatValue()
3144 APInt DemandedLHS, DemandedRHS; in computeKnownBits() local
3148 DemandedLHS, DemandedRHS)) in computeKnownBits()
3161 if (!!DemandedRHS) { in computeKnownBits()
4342 APInt DemandedLHS, DemandedRHS; in ComputeNumSignBits() local
4346 DemandedLHS, DemandedRHS)) in ComputeNumSignBits()
[all …]
|
| H A D | TargetLowering.cpp | 1329 APInt DemandedLHS, DemandedRHS; in SimplifyDemandedBits() local
1331 DemandedRHS)) in SimplifyDemandedBits()
1334 if (!!DemandedLHS || !!DemandedRHS) { in SimplifyDemandedBits()
1346 if (!!DemandedRHS) { in SimplifyDemandedBits()
1347 if (SimplifyDemandedBits(Op1, DemandedBits, DemandedRHS, Known2, TLO, in SimplifyDemandedBits()
1357 Op1, DemandedBits, DemandedRHS, TLO.DAG, Depth + 1); in SimplifyDemandedBits()
3372 APInt DemandedRHS(DemandedElts); in SimplifyDemandedVectorElts() local
3378 if (SimplifyDemandedVectorElts(RHS, DemandedRHS, UndefRHS, ZeroRHS, TLO, in SimplifyDemandedVectorElts()
3402 APInt DemandedRHS(NumElts, 0); in SimplifyDemandedVectorElts() local
3411 DemandedRHS.setBit(M - NumElts); in SimplifyDemandedVectorElts()
[all …]
|
| H A D | DAGCombiner.cpp | 25645 APInt DemandedRHS = APInt::getZero(NumElts); in visitVECTOR_SHUFFLE() local
25653 APInt &Demanded = M < (int)NumElts ? DemandedLHS : DemandedRHS; in visitVECTOR_SHUFFLE()
25658 if (!IsInLaneMask && (!DemandedLHS.isZero() || !DemandedRHS.isZero()) && in visitVECTOR_SHUFFLE()
25660 (DemandedRHS.isZero() || DAG.MaskedVectorIsZero(N1, DemandedRHS))) { in visitVECTOR_SHUFFLE()
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 5068 DemandedRHS.setBit(InnerIdx); in getPackDemandedElts()
36611 APInt DemandedLHS, DemandedRHS; in computeKnownBitsForTargetNode() local
36622 if (!!DemandedRHS) { in computeKnownBitsForTargetNode()
36904 APInt DemandedLHS, DemandedRHS; in ComputeNumSignBitsForTargetNode() local
36906 DemandedRHS); in ComputeNumSignBitsForTargetNode()
36930 if (!!DemandedRHS) in ComputeNumSignBitsForTargetNode()
41275 APInt DemandedLHS, DemandedRHS; in SimplifyDemandedVectorEltsForTargetNode() local
41312 APInt DemandedLHS, DemandedRHS; in SimplifyDemandedVectorEltsForTargetNode() local
41772 if (DemandedLHS || DemandedRHS) { in SimplifyDemandedBitsForTargetNode()
41774 DemandedRHS = DemandedRHS ? DemandedRHS : RHS; in SimplifyDemandedBitsForTargetNode()
[all …]
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 3686 SDValue DemandedRHS = TLI.SimplifyMultipleUseDemandedBits(RHS, Demanded, DAG); in simplifyMul24() local
3687 if (DemandedLHS || DemandedRHS) in simplifyMul24()
3690 DemandedRHS ? DemandedRHS : RHS); in simplifyMul24()
|