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Searched refs:ComputeLoop (Results 1 – 2 of 2) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUAtomicOptimizer.cpp86 BasicBlock *ComputeLoop, BasicBlock *ComputeEnd) const;
579 B.SetInsertPoint(ComputeLoop); in buildScanIteratively()
613 OldValuePhi->addIncoming(OldValue, ComputeLoop); in buildScanIteratively()
618 Accumulator->addIncoming(NewAccumulator, ComputeLoop); in buildScanIteratively()
626 ActiveBits->addIncoming(NewActiveBits, ComputeLoop); in buildScanIteratively()
630 B.CreateCondBr(IsEnd, ComputeEnd, ComputeLoop); in buildScanIteratively()
761 BasicBlock *ComputeLoop = nullptr; in optimizeAtomic() local
799 ComputeLoop = BasicBlock::Create(C, "ComputeLoop", F); in optimizeAtomic()
886 B.CreateBr(ComputeLoop); in optimizeAtomic()
890 {{DominatorTree::Insert, EntryBB, ComputeLoop}, in optimizeAtomic()
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H A DSIISelLowering.cpp4634 auto [ComputeLoop, ComputeEnd] = splitBlockForLoop(MI, BB, true); in lowerWaveReduce()
4661 BuildMI(BB, I, DL, TII->get(AMDGPU::S_BRANCH)).addMBB(ComputeLoop); in lowerWaveReduce()
4664 I = ComputeLoop->end(); in lowerWaveReduce()
4670 BuildMI(*ComputeLoop, I, DL, TII->get(AMDGPU::PHI), ActiveBitsReg) in lowerWaveReduce()
4676 auto FF1 = BuildMI(*ComputeLoop, I, DL, TII->get(SFFOpc), FF1Reg) in lowerWaveReduce()
4678 auto LaneValue = BuildMI(*ComputeLoop, I, DL, in lowerWaveReduce()
4696 .addMBB(ComputeLoop); in lowerWaveReduce()
4698 .addMBB(ComputeLoop); in lowerWaveReduce()
4702 BuildMI(*ComputeLoop, I, DL, TII->get(CMPOpc)) in lowerWaveReduce()
4705 BuildMI(*ComputeLoop, I, DL, TII->get(AMDGPU::S_CBRANCH_SCC1)) in lowerWaveReduce()
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