Searched refs:CPU_TIMER2_EN (Results 1 – 3 of 3) sorted by relevance
229 val |= CPU_TIMER2_EN | CPU_TIMER2_AUTO; in mv_wdt_enable_armv5()278 val |= CPU_TIMER2_EN | CPU_TIMER2_AUTO | CPU_TIMER_WD_25MHZ_EN; in mv_wdt_enable_armada_xp()288 val &= ~(CPU_TIMER2_EN | CPU_TIMER2_AUTO); in mv_wdt_disable_armv5()336 val &= ~(CPU_TIMER2_EN | CPU_TIMER2_AUTO); in mv_wdt_disable_armada_xp()
402 val |= CPU_TIMER2_EN | CPU_TIMER2_AUTO; in mv_watchdog_enable_armv5()424 val |= CPU_TIMER2_EN | CPU_TIMER2_AUTO | CPU_TIMER_WD_25MHZ_EN; in mv_watchdog_enable_armadaxp()434 val &= ~(CPU_TIMER2_EN | CPU_TIMER2_AUTO); in mv_watchdog_disable_armv5()468 val &= ~(CPU_TIMER2_EN | CPU_TIMER2_AUTO); in mv_watchdog_disable_armadaxp()
197 #define CPU_TIMER2_EN 0x00000010 macro