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Searched refs:BitShift (Results 1 – 7 of 7) sorted by relevance

/freebsd-14.2/contrib/llvm-project/llvm/lib/Support/
H A DAPInt.cpp1036 unsigned BitShift = ShiftAmt % APINT_BITS_PER_WORD; in ashrSlowCase() local
1045 if (BitShift == 0) { in ashrSlowCase()
1050 U.pVal[i] = (U.pVal[i + WordShift] >> BitShift) | in ashrSlowCase()
2683 unsigned BitShift = Count % APINT_BITS_PER_WORD; in tcShiftLeft() local
2686 if (BitShift == 0) { in tcShiftLeft()
2690 Dst[Words] = Dst[Words - WordShift] << BitShift; in tcShiftLeft()
2693 Dst[Words - WordShift - 1] >> (APINT_BITS_PER_WORD - BitShift); in tcShiftLeft()
2710 unsigned BitShift = Count % APINT_BITS_PER_WORD; in tcShiftRight() local
2714 if (BitShift == 0) { in tcShiftRight()
2718 Dst[i] = Dst[i + WordShift] >> BitShift; in tcShiftRight()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DLocal.cpp3721 const APInt &BitShift = *C; in collectBitParts() local
3724 if (BitShift.uge(BitWidth)) in collectBitParts()
3728 if (!MatchBitReversals && (BitShift.getZExtValue() % 8) != 0) in collectBitParts()
3740 P.erase(std::prev(P.end(), BitShift.getZExtValue()), P.end()); in collectBitParts()
3741 P.insert(P.begin(), BitShift.getZExtValue(), BitPart::Unset); in collectBitParts()
3743 P.erase(P.begin(), std::next(P.begin(), BitShift.getZExtValue())); in collectBitParts()
3744 P.insert(P.end(), BitShift.getZExtValue(), BitPart::Unset); in collectBitParts()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp4569 BitShift = DAG.getNode(ISD::SHL, DL, PtrVT, Addr, in getCSAddressAndShifts()
4571 BitShift = DAG.getNode(ISD::TRUNCATE, DL, WideVT, BitShift); in getCSAddressAndShifts()
4607 SDValue AlignedAddr, BitShift, NegBitShift; in lowerATOMIC_LOAD_OP() local
4632 SDValue ResultShift = DAG.getNode(ISD::ADD, DL, WideVT, BitShift, in lowerATOMIC_LOAD_OP()
4703 SDValue AlignedAddr, BitShift, NegBitShift; in lowerATOMIC_CMP_SWAP() local
8399 Register BitShift = MI.getOperand(4).getReg(); in emitAtomicLoadBinary() local
8442 .addReg(OldVal).addReg(BitShift).addImm(0); in emitAtomicLoadBinary()
8494 Register BitShift = MI.getOperand(4).getReg(); in emitAtomicLoadMinMax() local
8537 .addReg(OldVal).addReg(BitShift).addImm(0); in emitAtomicLoadMinMax()
8596 Register BitShift = MI.getOperand(5).getReg(); in emitAtomicCmpSwapW() local
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600ISelLowering.cpp1167 SDValue BitShift = DAG.getNode(ISD::SHL, DL, VT, ByteIndex, in LowerSTORE() local
1171 SDValue Mask = DAG.getNode(ISD::SHL, DL, VT, MaskConstant, BitShift); in LowerSTORE()
1175 SDValue ShiftedValue = DAG.getNode(ISD::SHL, DL, VT, TruncValue, BitShift); in LowerSTORE()
H A DSIISelLowering.cpp11582 uint64_t BitShift = ShiftOp->getZExtValue(); in calculateSrcByte() local
11584 if (BitShift % 8 != 0) in calculateSrcByte()
11587 SrcIndex += BitShift / 8; in calculateSrcByte()
11671 if (BitShift % 8) in calculateByteProvider()
11675 uint64_t ByteShift = BitShift / 8; in calculateByteProvider()
11690 uint64_t BitShift = ShiftOp->getZExtValue(); in calculateByteProvider() local
11691 if (BitShift % 8) in calculateByteProvider()
11699 uint64_t ByteShift = BitShift / 8; in calculateByteProvider()
11715 uint64_t BitShift = ShiftOp->getZExtValue(); in calculateByteProvider() local
11716 if (BitShift % 8 != 0) in calculateByteProvider()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Analysis/
H A DConstantFolding.cpp77 unsigned BitShift = DL.getTypeSizeInBits(SrcEltTy); in foldConstVectorToAPInt() local
86 Result <<= BitShift; in foldConstVectorToAPInt()
94 Result <<= BitShift; in foldConstVectorToAPInt()
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp8723 uint64_t BitShift = ShiftOp->getZExtValue(); in calculateByteProvider() local
8725 if (BitShift % 8 != 0) in calculateByteProvider()
8727 uint64_t ByteShift = BitShift / 8; in calculateByteProvider()