Lines Matching refs:BitShift
4558 SDValue &AlignedAddr, SDValue &BitShift, in getCSAddressAndShifts() argument
4569 BitShift = DAG.getNode(ISD::SHL, DL, PtrVT, Addr, in getCSAddressAndShifts()
4571 BitShift = DAG.getNode(ISD::TRUNCATE, DL, WideVT, BitShift); in getCSAddressAndShifts()
4576 DAG.getConstant(0, DL, WideVT), BitShift); in getCSAddressAndShifts()
4607 SDValue AlignedAddr, BitShift, NegBitShift; in lowerATOMIC_LOAD_OP() local
4608 getCSAddressAndShifts(Addr, DAG, DL, AlignedAddr, BitShift, NegBitShift); in lowerATOMIC_LOAD_OP()
4625 SDValue Ops[] = { ChainIn, AlignedAddr, Src2, BitShift, NegBitShift, in lowerATOMIC_LOAD_OP()
4632 SDValue ResultShift = DAG.getNode(ISD::ADD, DL, WideVT, BitShift, in lowerATOMIC_LOAD_OP()
4703 SDValue AlignedAddr, BitShift, NegBitShift; in lowerATOMIC_CMP_SWAP() local
4704 getCSAddressAndShifts(Addr, DAG, DL, AlignedAddr, BitShift, NegBitShift); in lowerATOMIC_CMP_SWAP()
4708 SDValue Ops[] = { ChainIn, AlignedAddr, CmpVal, SwapVal, BitShift, in lowerATOMIC_CMP_SWAP()
8399 Register BitShift = MI.getOperand(4).getReg(); in emitAtomicLoadBinary() local
8442 .addReg(OldVal).addReg(BitShift).addImm(0); in emitAtomicLoadBinary()
8494 Register BitShift = MI.getOperand(4).getReg(); in emitAtomicLoadMinMax() local
8537 .addReg(OldVal).addReg(BitShift).addImm(0); in emitAtomicLoadMinMax()
8596 Register BitShift = MI.getOperand(5).getReg(); in emitAtomicCmpSwapW() local
8656 .addReg(OldVal).addReg(BitShift).addImm(BitSize); in emitAtomicCmpSwapW()