Searched refs:ArgDescriptor (Results 1 – 12 of 12) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUArgumentUsageInfo.h | 24 struct ArgDescriptor { struct 53 static ArgDescriptor createArg(const ArgDescriptor &Arg, unsigned Mask) { in createArg() argument 131 ArgDescriptor DispatchPtr; 132 ArgDescriptor QueuePtr; 134 ArgDescriptor DispatchID; 137 ArgDescriptor LDSKernelId; 140 ArgDescriptor WorkGroupIDX; 141 ArgDescriptor WorkGroupIDY; 155 ArgDescriptor WorkItemIDX; 156 ArgDescriptor WorkItemIDY; [all …]
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| H A D | AMDGPUArgumentUsageInfo.cpp | 26 void ArgDescriptor::print(raw_ostream &OS, in print() 90 std::tuple<const ArgDescriptor *, const TargetRegisterClass *, LLT> 155 = ArgDescriptor::createRegister(AMDGPU::SGPR0_SGPR1_SGPR2_SGPR3); in fixedABILayout() 156 AI.DispatchPtr = ArgDescriptor::createRegister(AMDGPU::SGPR4_SGPR5); in fixedABILayout() 157 AI.QueuePtr = ArgDescriptor::createRegister(AMDGPU::SGPR6_SGPR7); in fixedABILayout() 162 AI.DispatchID = ArgDescriptor::createRegister(AMDGPU::SGPR10_SGPR11); in fixedABILayout() 165 AI.WorkGroupIDX = ArgDescriptor::createRegister(AMDGPU::SGPR12); in fixedABILayout() 166 AI.WorkGroupIDY = ArgDescriptor::createRegister(AMDGPU::SGPR13); in fixedABILayout() 167 AI.WorkGroupIDZ = ArgDescriptor::createRegister(AMDGPU::SGPR14); in fixedABILayout() 168 AI.LDSKernelId = ArgDescriptor::createRegister(AMDGPU::SGPR15); in fixedABILayout() [all …]
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| H A D | SIMachineFunctionInfo.cpp | 77 ArgDescriptor::createRegister(ScratchRSrcReg); in SIMachineFunctionInfo() 94 ArgDescriptor::createRegister(ScratchRSrcReg); in SIMachineFunctionInfo() 151 ArgDescriptor::createRegister(AMDGPU::SGPR5); in SIMachineFunctionInfo() 191 ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addPrivateSegmentBuffer() 198 ArgInfo.DispatchPtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addDispatchPtr() 205 ArgInfo.QueuePtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addQueuePtr() 213 = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addKernargSegmentPtr() 220 ArgInfo.DispatchID = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addDispatchID() 227 ArgInfo.FlatScratchInit = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addFlatScratchInit() 241 ArgInfo.LDSKernelId = ArgDescriptor::createRegister(getNextUserSGPR()); in addLDSKernelId() [all …]
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| H A D | SIMachineFunctionInfo.h | 755 ArgInfo.WorkGroupIDX = ArgDescriptor::createRegister(getNextSystemSGPR()); 761 ArgInfo.WorkGroupIDY = ArgDescriptor::createRegister(getNextSystemSGPR()); 767 ArgInfo.WorkGroupIDZ = ArgDescriptor::createRegister(getNextSystemSGPR()); 773 ArgInfo.WorkGroupInfo = ArgDescriptor::createRegister(getNextSystemSGPR()); 781 void setWorkItemIDX(ArgDescriptor Arg) { 785 void setWorkItemIDY(ArgDescriptor Arg) { 789 void setWorkItemIDZ(ArgDescriptor Arg) { 795 = ArgDescriptor::createRegister(getNextSystemSGPR()); 801 ArgInfo.PrivateSegmentWaveByteOffset = ArgDescriptor::createRegister(Reg); 848 std::tuple<const ArgDescriptor *, const TargetRegisterClass *, LLT>
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| H A D | AMDGPUCallLowering.cpp | 801 const ArgDescriptor *OutgoingArg; in passSpecialInputs() 814 const ArgDescriptor *IncomingArg; in passSpecialInputs() 852 const ArgDescriptor *OutgoingArg; in passSpecialInputs() 874 const ArgDescriptor *IncomingArgX = std::get<0>(WorkitemIDX); in passSpecialInputs() 875 const ArgDescriptor *IncomingArgY = std::get<0>(WorkitemIDY); in passSpecialInputs() 876 const ArgDescriptor *IncomingArgZ = std::get<0>(WorkitemIDZ); in passSpecialInputs() 929 ArgDescriptor IncomingArg = ArgDescriptor::createArg( in passSpecialInputs()
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| H A D | AMDGPUISelLowering.h | 25 struct ArgDescriptor; 357 const ArgDescriptor &Arg) const;
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| H A D | AMDGPUTargetMachine.cpp | 1594 ArgDescriptor &Arg, unsigned UserSGPRs, in parseMachineFunctionInfo() 1608 Arg = ArgDescriptor::createRegister(Reg); in parseMachineFunctionInfo() 1610 Arg = ArgDescriptor::createStack(A->StackOffset); in parseMachineFunctionInfo() 1613 Arg = ArgDescriptor::createArg(Arg, *A->Mask); in parseMachineFunctionInfo()
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| H A D | AMDGPULegalizerInfo.h | 113 const ArgDescriptor *Arg,
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| H A D | SIISelLowering.cpp | 1910 const ArgDescriptor *InputPtrReg; in lowerKernArgParameterPtr() 2075 const ArgDescriptor *Reg = nullptr; in getPreloadedValue() 2080 const ArgDescriptor WorkGroupIDX = in getPreloadedValue() 2085 const ArgDescriptor WorkGroupIDY = ArgDescriptor::createRegister( in getPreloadedValue() 2088 const ArgDescriptor WorkGroupIDZ = in getPreloadedValue() 2230 ArgDescriptor Arg = ArgDescriptor()) { in allocateVGPR32Input() 2304 ArgDescriptor Arg; in allocateSpecialInputVGPRs() 3273 const ArgDescriptor *OutgoingArg; in passSpecialInputs() 3288 const ArgDescriptor *IncomingArg; in passSpecialInputs() 3334 const ArgDescriptor *OutgoingArg; in passSpecialInputs() [all …]
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| H A D | AMDGPULegalizerInfo.cpp | 4145 const ArgDescriptor *Arg, in loadInputValue() 4181 const ArgDescriptor *Arg = nullptr; in loadInputValue() 4186 const ArgDescriptor WorkGroupIDX = in loadInputValue() 4187 ArgDescriptor::createRegister(AMDGPU::TTMP9); in loadInputValue() 4191 const ArgDescriptor WorkGroupIDY = ArgDescriptor::createRegister( in loadInputValue() 4194 const ArgDescriptor WorkGroupIDZ = in loadInputValue() 4195 ArgDescriptor::createRegister(AMDGPU::TTMP7, 0xFFFF0000u); in loadInputValue() 4265 const ArgDescriptor *Arg; in legalizeWorkitemIDIntrinsic()
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| H A D | SIISelLowering.h | 85 const ArgDescriptor &ArgDesc) const;
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| H A D | AMDGPUISelLowering.cpp | 5311 const ArgDescriptor &Arg) const { in loadInputValue()
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