Lines Matching refs:ArgDescriptor

1910   const ArgDescriptor *InputPtrReg;  in lowerKernArgParameterPtr()
2075 const ArgDescriptor *Reg = nullptr; in getPreloadedValue()
2080 const ArgDescriptor WorkGroupIDX = in getPreloadedValue()
2081 ArgDescriptor::createRegister(AMDGPU::TTMP9); in getPreloadedValue()
2085 const ArgDescriptor WorkGroupIDY = ArgDescriptor::createRegister( in getPreloadedValue()
2088 const ArgDescriptor WorkGroupIDZ = in getPreloadedValue()
2089 ArgDescriptor::createRegister(AMDGPU::TTMP7, 0xFFFF0000u); in getPreloadedValue()
2193 Info.setWorkItemIDX(ArgDescriptor::createRegister(Reg, Mask)); in allocateSpecialEntryInputVGPRs()
2199 Info.setWorkItemIDY(ArgDescriptor::createRegister(AMDGPU::VGPR0, in allocateSpecialEntryInputVGPRs()
2206 Info.setWorkItemIDY(ArgDescriptor::createRegister(Reg)); in allocateSpecialEntryInputVGPRs()
2213 Info.setWorkItemIDZ(ArgDescriptor::createRegister(AMDGPU::VGPR0, in allocateSpecialEntryInputVGPRs()
2220 Info.setWorkItemIDZ(ArgDescriptor::createRegister(Reg)); in allocateSpecialEntryInputVGPRs()
2229 static ArgDescriptor allocateVGPR32Input(CCState &CCInfo, unsigned Mask = ~0u, in allocateVGPR32Input()
2230 ArgDescriptor Arg = ArgDescriptor()) { in allocateVGPR32Input()
2232 return ArgDescriptor::createArg(Arg, Mask); in allocateVGPR32Input()
2240 return ArgDescriptor::createStack(Offset, Mask); in allocateVGPR32Input()
2250 return ArgDescriptor::createRegister(Reg, Mask); in allocateVGPR32Input()
2253 static ArgDescriptor allocateSGPR32InputImpl(CCState &CCInfo, in allocateSGPR32InputImpl()
2267 return ArgDescriptor::createRegister(Reg); in allocateSGPR32InputImpl()
2282 static void allocateSGPR32Input(CCState &CCInfo, ArgDescriptor &Arg) { in allocateSGPR32Input()
2290 static void allocateSGPR64Input(CCState &CCInfo, ArgDescriptor &Arg) { in allocateSGPR64Input()
2304 ArgDescriptor Arg; in allocateSpecialInputVGPRs()
2329 Info.setWorkItemIDX(ArgDescriptor::createRegister(Reg, Mask)); in allocateSpecialInputVGPRsFixed()
2330 Info.setWorkItemIDY(ArgDescriptor::createRegister(Reg, Mask << 10)); in allocateSpecialInputVGPRsFixed()
2331 Info.setWorkItemIDZ(ArgDescriptor::createRegister(Reg, Mask << 20)); in allocateSpecialInputVGPRsFixed()
3273 const ArgDescriptor *OutgoingArg; in passSpecialInputs()
3288 const ArgDescriptor *IncomingArg; in passSpecialInputs()
3334 const ArgDescriptor *OutgoingArg; in passSpecialInputs()
3349 const ArgDescriptor *IncomingArgX = std::get<0>( in passSpecialInputs()
3351 const ArgDescriptor *IncomingArgY = std::get<0>( in passSpecialInputs()
3353 const ArgDescriptor *IncomingArgZ = std::get<0>( in passSpecialInputs()
3401 ArgDescriptor IncomingArg = ArgDescriptor::createArg( in passSpecialInputs()
7936 const ArgDescriptor &Arg) const { in lowerWorkitemID()