| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 115 ARMBaseInstrInfo::ARMBaseInstrInfo(const ARMSubtarget& STI) in ARMBaseInstrInfo() function in ARMBaseInstrInfo
164 ScheduleHazardRecognizer *ARMBaseInstrInfo::
550 bool ARMBaseInstrInfo::
601 bool ARMBaseInstrInfo::PredicateInstruction( in PredicateInstruction()
717 return !ARMBaseInstrInfo::isCPSRDefined(*MI); in isEligibleForITBlock()
2094 bool ARMBaseInstrInfo::
2120 bool ARMBaseInstrInfo::
3013 bool ARMBaseInstrInfo::optimizeCompareInstr( in optimizeCompareInstr()
5433 bool ARMBaseInstrInfo::hasNOP() const { in hasNOP()
5874 ARMBaseInstrInfo::getOutliningCandidateInfo( in getOutliningCandidateInfo()
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| H A D | ThumbRegisterInfo.h | 23 class ARMBaseInstrInfo; variable
51 const ARMBaseInstrInfo &TII) const;
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| H A D | ARMBasicBlockInfo.h | 114 const ARMBaseInstrInfo *TII = nullptr;
120 static_cast<const ARMBaseInstrInfo*>(MF.getSubtarget().getInstrInfo()); in ARMBasicBlockUtils()
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| H A D | Thumb2InstrInfo.cpp | 49 : ARMBaseInstrInfo(STI) {} in Thumb2InstrInfo()
132 MachineInstr *RV = ARMBaseInstrInfo::optimizeSelect(MI, SeenMIs, PreferFalse); in optimizeSelect()
156 return ARMBaseInstrInfo::copyPhysReg(MBB, I, DL, DestReg, SrcReg, KillSrc); in copyPhysReg()
204 ARMBaseInstrInfo::storeRegToStackSlot(MBB, I, SrcReg, isKill, FI, RC, TRI, in storeRegToStackSlot()
250 ARMBaseInstrInfo::loadRegFromStackSlot(MBB, I, DestReg, FI, RC, TRI, in loadRegFromStackSlot()
286 return ARMBaseInstrInfo::commuteInstructionImpl(MI, NewMI, OpIdx1, OpIdx2); in commuteInstructionImpl()
294 const ARMBaseInstrInfo &TII, in emitT2RegPlusImmediate()
534 const ARMBaseInstrInfo &TII, in rewriteT2FrameIndex()
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| H A D | ARMSubtarget.cpp | 103 ? (ARMBaseInstrInfo *)new Thumb1InstrInfo(*this) in ARMSubtarget()
105 ? (ARMBaseInstrInfo *)new ARMInstrInfo(*this) in ARMSubtarget()
106 : (ARMBaseInstrInfo *)new Thumb2InstrInfo(*this)), in ARMSubtarget()
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| H A D | ARMFixCortexA57AES1742098Pass.cpp | 108 void insertAESFixup(AESFixupLocation &FixupLoc, const ARMBaseInstrInfo *TII,
256 const ARMBaseInstrInfo *TII = STI.getInstrInfo(); in runOnMachineFunction()
398 AESFixupLocation &FixupLoc, const ARMBaseInstrInfo *TII, in insertAESFixup()
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| H A D | ARMInstrInfo.h | 22 class ARMInstrInfo : public ARMBaseInstrInfo {
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| H A D | ARMBaseInstrInfo.h | 37 class ARMBaseInstrInfo : public ARMGenInstrInfo {
42 explicit ARMBaseInstrInfo(const ARMSubtarget &STI);
802 const ARMBaseInstrInfo &TII, unsigned MIFlags = 0);
809 const ARMBaseInstrInfo &TII, unsigned MIFlags = 0);
833 const ARMBaseInstrInfo &TII);
837 const ARMBaseInstrInfo &TII,
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| H A D | Thumb1InstrInfo.h | 22 class Thumb1InstrInfo : public ARMBaseInstrInfo {
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| H A D | ARMHazardRecognizer.cpp | 57 const ARMBaseInstrInfo &TII = *static_cast<const ARMBaseInstrInfo *>( in getHazardType()
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| H A D | ARMBlockPlacement.cpp | 32 const ARMBaseInstrInfo *TII;
221 TII = static_cast<const ARMBaseInstrInfo *>(ST.getInstrInfo()); in runOnMachineFunction()
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| H A D | Thumb2InstrInfo.h | 22 class Thumb2InstrInfo : public ARMBaseInstrInfo {
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| H A D | ARMSubtarget.h | 265 const ARMBaseInstrInfo *getInstrInfo() const override { in getInstrInfo()
291 std::unique_ptr<ARMBaseInstrInfo> InstrInfo;
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| H A D | ARMFrameLowering.cpp | 513 const ARMBaseInstrInfo &TII, unsigned MIFlags) { in insertSEHRange()
536 const DebugLoc &dl, const ARMBaseInstrInfo &TII, unsigned DestReg, in emitRegPlusImmediate()
549 const ARMBaseInstrInfo &TII, int NumBytes, in emitSPUpdate()
619 const ARMBaseInstrInfo &TII, bool HasFP) { in emitDefCFAOffsets()
741 const ARMBaseInstrInfo &TII = *STI.getInstrInfo(); in emitPrologue()
1277 const ARMBaseInstrInfo &TII = in emitEpilogue()
2070 const ARMBaseInstrInfo &TII) { in EstimateFunctionSizeInBytes()
2091 const ARMBaseInstrInfo &TII = in estimateRSStackSizeLimit()
2279 const ARMBaseInstrInfo &TII = in determineCalleeSaves()
2870 const ARMBaseInstrInfo &TII = in eliminateCallFramePseudoInstr()
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| H A D | ARMBaseRegisterInfo.cpp | 697 const ARMBaseInstrInfo &TII = in resolveFrameIndex()
698 *static_cast<const ARMBaseInstrInfo *>(MF.getSubtarget().getInstrInfo()); in resolveFrameIndex()
796 const ARMBaseInstrInfo &TII = in eliminateFrameIndex()
797 *static_cast<const ARMBaseInstrInfo *>(MF.getSubtarget().getInstrInfo()); in eliminateFrameIndex()
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| H A D | MLxExpansionPass.cpp | 50 const ARMBaseInstrInfo *TII;
374 TII = static_cast<const ARMBaseInstrInfo *>(Fn.getSubtarget().getInstrInfo()); in runOnMachineFunction()
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| H A D | ARMInstrInfo.cpp | 31 ARMInstrInfo::ARMInstrInfo(const ARMSubtarget &STI) : ARMBaseInstrInfo(STI) {} in ARMInstrInfo()
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| H A D | ThumbRegisterInfo.cpp | 427 const ARMBaseInstrInfo &TII) const { in rewriteFrameIndex()
528 const ARMBaseInstrInfo &TII = *STI.getInstrInfo(); in resolveFrameIndex()
553 const ARMBaseInstrInfo &TII = *STI.getInstrInfo(); in eliminateFrameIndex()
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| H A D | ARMSchedule.td | 146 const ARMBaseInstrInfo *TII =
147 static_cast<const ARMBaseInstrInfo*>(SchedModel->getInstrInfo());
162 "ARMBaseInstrInfo::isCPSRDefined"
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| H A D | Thumb1InstrInfo.cpp | 24 : ARMBaseInstrInfo(STI) {} in Thumb1InstrInfo()
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| H A D | ARMInstructionSelector.cpp | 73 const ARMBaseInstrInfo &TII;
232 const ARMBaseInstrInfo &TII, in selectMergeValues()
263 const ARMBaseInstrInfo &TII, in selectUnmergeValues()
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| H A D | ARMLowOverheadLoops.cpp | 371 const ARMBaseInstrInfo &TII;
389 const ARMBaseInstrInfo &TII) in LowOverheadLoop()
477 const ARMBaseInstrInfo *TII = nullptr;
1314 TII = static_cast<const ARMBaseInstrInfo*>(ST.getInstrInfo()); in runOnMachineFunction()
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| H A D | A15SDOptimizer.cpp | 57 const ARMBaseInstrInfo *TII;
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| H A D | ARMExpandPseudoInsts.cpp | 46 const ARMBaseInstrInfo *TII;
2196 const ARMBaseInstrInfo &TII = *static_cast<const ARMBaseInstrInfo *>( in ExpandMI()
2487 const ARMBaseInstrInfo *AII = in ExpandMI()
2488 static_cast<const ARMBaseInstrInfo*>(TII); in ExpandMI()
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| H A D | ARMConstantIslandPass.cpp | 215 const ARMBaseInstrInfo *TII;
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