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Searched refs:writeback (Results 1 – 24 of 24) sorted by relevance

/freebsd-13.1/usr.bin/mail/
H A Dquit.c187 writeback(rbuf); in quit()
297 writeback(rbuf); in quit()
338 writeback(FILE *res) in writeback() function
H A Dextern.h251 int writeback(FILE *);
/freebsd-13.1/sys/contrib/device-tree/Bindings/display/
H A Dbrcm,bcm2835-txp.yaml7 title: Broadcom VC4 (VideoCore4) TXP (writeback) Controller
H A Dbrcm,bcm-vc4.txt77 Required properties for the TXP (writeback) block:
/freebsd-13.1/sys/contrib/device-tree/Bindings/media/
H A Dexynos5-gsc.txt16 set writeback input and destination
H A Dsamsung-fimc.txt88 writeback input.
90 writeback input.
/freebsd-13.1/contrib/llvm-project/clang/lib/CodeGen/
H A DCGCall.h310 Writeback writeback = {srcLV, temporary, toUse}; in addWriteback() local
311 Writebacks.push_back(writeback); in addWriteback()
H A DCGCall.cpp3741 const CallArgList::Writeback &writeback) { in emitWriteback() argument
3742 const LValue &srcLV = writeback.Source; in emitWriteback()
3764 llvm::Value *value = CGF.Builder.CreateLoad(writeback.Temporary); in emitWriteback()
3777 if (writeback.ToUse) { in emitWriteback()
3785 CGF.EmitARCIntrinsicUse(writeback.ToUse); in emitWriteback()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SchedCyclone.td65 // consumes the pipe for one cycle at issue and another cycle at writeback.
94 // but only consume the pipe for one cycle at issue and a cycle at writeback.
207 // The ID pipe is consumed for 2 cycles: issue and writeback.
214 // The ID pipe is consumed for 2 cycles: issue and writeback.
630 // Only the first WriteVLD and WriteAdr for writeback matches def operands.
771 // Only the WriteAdr for writeback matches a def operands.
H A DAArch64InstrFormats.td1729 def writeback : BaseAuthLoad<M, 1, (outs GPR64sp:$wback, GPR64:$Rt),
1738 (!cast<Instruction>(NAME # "writeback") GPR64sp:$wback, GPR64:$Rt, 0), 0>;
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp1901 bool writeback = (P == 0) || (W == 1); in DecodeAddrMode2IdxInstruction() local
1903 if (P && writeback) in DecodeAddrMode2IdxInstruction()
1905 else if (!P && writeback) in DecodeAddrMode2IdxInstruction()
1908 if (writeback && (Rn == 15 || Rn == Rt)) in DecodeAddrMode2IdxInstruction()
2008 bool writeback = (W == 1) | (P == 0); in DecodeAddrMode3Instruction() local
2061 if (!type && writeback && Rn == 15) in DecodeAddrMode3Instruction()
2103 if (writeback) { // Writeback in DecodeAddrMode3Instruction()
2141 if (writeback) { in DecodeAddrMode3Instruction()
5564 bool writeback = (W == 1) | (P == 0); in DecodeT2LDRDPreInstruction() local
5568 if (writeback && (Rn == Rt || Rn == Rt2)) in DecodeT2LDRDPreInstruction()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMScheduleM7.td30 // EX3: slow load data integer writeback FP operation
31 // EX4: store data FP writeback
H A DARMScheduleA9.td447 // register file writeback!).
2336 // A9WriteAdr consumes AGU regardless address writeback. But it's
2346 // Store either has no def operands, or the one def for address writeback.
2364 // Load multiple with address writeback has an extra def operand in
2368 // resources are identical, For stores only the address writeback
2383 // Note: Unlike VLDM, VLD1 expects the writeback operand after the
2404 // address writeback.
H A DARMScheduleA57.td592 // TODO: no writeback latency defined in documentation (implemented as 1 cyc)
626 // Store, immed pre-indexed (1cyc "S, I0/I1", 1cyc writeback)
688 // TODO: no writeback latency defined in documentation
1263 // 1-2 reg: 5cyc L, +I for writeback, 1 cyc wb latency
1268 // 3-4 reg: 6cyc L, +I for writeback, 1 cyc wb latency
H A DARMInstrNEON.td626 // ...with address register writeback:
826 // ...with address register writeback:
899 // ...with address register writeback:
959 // ...with address register writeback:
1115 // ...with address register writeback:
1178 // ...with address register writeback:
1249 // ...with address register writeback:
1327 // ...with address register writeback:
1419 // ...with address register writeback:
1501 // ...with address register writeback:
[all …]
H A DARMInstrMVE.td5933 let Inst{21} = writeback;
5949 // A parameter class used to encapsulate all the ways the writeback
5950 // variants of VLD20 and friends differ from the non-writeback ones.
5953 bit writeback = b;
5984 : MVE_vldst24_base<wb.writeback, n.bit0, pat, size, 1,
5993 : MVE_vldst24_base<wb.writeback, n.bit0, pat, size, 0,
6001 // vector lane; writeback or no writeback.
6188 // generate three writeback modes (none, preindex, postindex).
6418 // writeback, in which the address vector is updated to hold the
6436 // Multiclass that generates the non-writeback and writeback variants.
[all …]
H A DARMInstrVFP.td235 let Inst{21} = 0; // No writeback
263 let Inst{21} = 0; // No writeback
370 let Inst{21} = 0; // No writeback
H A DARMScheduleSwift.td93 // Plain load without writeback.
H A DARMInstrThumb2.td1984 let Inst{21} = 0; // No writeback
2014 let Inst{21} = 0; // No writeback
2053 let Inst{21} = 0; // No writeback
2089 let Inst{21} = 0; // No writeback
H A DARMInstrInfo.td3453 let Inst{21} = 0; // No writeback
3473 let Inst{21} = 0; // No writeback
3493 let Inst{21} = 0; // No writeback
3513 let Inst{21} = 0; // No writeback
H A DARMInstrThumb.td851 // There is no non-writeback version of STM for Thumb.
/freebsd-13.1/sys/netpfil/pf/
H A Dpf_norm.c1539 struct pf_state_peer *src, struct pf_state_peer *dst, int *writeback) in pf_normalize_tcp_stateful() argument
1659 *writeback = 1; in pf_normalize_tcp_stateful()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/Disassembler/
H A DAArch64Disassembler.cpp1654 unsigned writeback = fieldFromInstruction(insn, 11, 1); in DecodeAuthLoadInstruction() local
1673 if (writeback && Rt == Rn && Rn != 31) { in DecodeAuthLoadInstruction()
/freebsd-13.1/contrib/llvm-project/clang/include/clang/Basic/
H A Darm_mve.td303 // Straightforward case with neither writeback nor predication
308 // Predicated form without writeback
322 // Both writeback and predicated