| /freebsd-13.1/sys/dev/uart/ |
| H A D | uart_dev_ns8250.c | 119 uart_setreg(bas, REG_LCR, lcr); in ns8250_delay() 215 uart_setreg(bas, REG_FCR, fcr); in ns8250_flush() 252 uart_setreg(bas, REG_LCR, lcr); in ns8250_param() 319 uart_setreg(bas, REG_IER, ier); in ns8250_init() 327 uart_setreg(bas, REG_FCR, val); in ns8250_init() 354 uart_setreg(bas, REG_DATA, c); in ns8250_putc() 572 uart_setreg(bas, REG_IER, ier); in ns8250_bus_detach() 835 uart_setreg(bas, REG_FCR, val); in ns8250_bus_probe() 853 uart_setreg(bas, REG_FCR, val); in ns8250_bus_probe() 880 uart_setreg(bas, REG_DATA, 0); in ns8250_bus_probe() [all …]
|
| H A D | uart_dev_mvebu.c | 214 uart_setreg(bas, UART_CCR, ccr | divisor); in uart_mvebu_param() 222 uart_setreg(bas, UART_CTRL, ctrl); in uart_mvebu_param() 248 uart_setreg(bas, UART_TSH, c & 0xff); in uart_mvebu_putc() 346 uart_setreg(bas, UART_CTRL, ctrl); in uart_mvebu_bus_attach() 389 uart_setreg(bas, UART_CTRL, ctrl); in uart_mvebu_bus_flush() 420 uart_setreg(bas, UART_CTRL, ctrl); in uart_mvebu_bus_ioctl() 565 uart_setreg(bas, UART_CTRL, ctrl & ~CTRL_INTR_MASK); in uart_mvebu_bus_transmit() 569 uart_setreg(bas, UART_TSH, sc->sc_txbuf[i] & 0xff); in uart_mvebu_bus_transmit() 577 uart_setreg(bas, UART_CTRL, ctrl | CTRL_TX_IDLE_INT); in uart_mvebu_bus_transmit() 598 uart_setreg(bas, UART_CTRL, ctrl & ~CTRL_INTR_MASK); in uart_mvebu_bus_grab() [all …]
|
| H A D | uart_dev_msm.c | 123 uart_setreg(bas, UART_DM_MR2, ulcon); in msm_uart_param() 164 uart_setreg(bas, UART_DM_MR1, 0x0); in msm_init() 167 uart_setreg(bas, UART_DM_IMR, 0); in msm_init() 174 uart_setreg(bas, UART_DM_TFWR, UART_DM_TFW_VALUE); in msm_init() 177 uart_setreg(bas, UART_DM_RFWR, UART_DM_RFW_VALUE); in msm_init() 186 uart_setreg(bas, UART_DM_IRDA, 0x0); in msm_init() 193 uart_setreg(bas, UART_DM_HCR, 0x0); in msm_init() 206 uart_setreg(bas, UART_DM_CR, UART_DM_CR_RX_ENABLE); in msm_init() 207 uart_setreg(bas, UART_DM_CR, UART_DM_CR_TX_ENABLE); in msm_init() 242 uart_setreg(bas, UART_DM_NO_CHARS_FOR_TX, 1); in msm_putc() [all …]
|
| H A D | uart_dev_ti8250.c | 85 uart_setreg(&sc->sc_bas, MDR1_REG, MDR1_MODE_DISABLE); in ti8250_bus_probe() 86 uart_setreg(&sc->sc_bas, SYSCC_REG, SYSCC_SOFTRESET); in ti8250_bus_probe() 89 uart_setreg(&sc->sc_bas, MDR1_REG, MDR1_MODE_UART); in ti8250_bus_probe()
|
| H A D | uart_dev_z8530.c | 60 uart_setreg(bas, REG_CTRL, reg); in uart_setmreg() 62 uart_setreg(bas, REG_CTRL, val); in uart_setmreg() 69 uart_setreg(bas, REG_CTRL, reg); in uart_getmreg() 235 uart_setreg(bas, REG_DATA, c); in z8530_putc() 459 uart_setreg(bas, REG_CTRL, CR_RSTTXI); in z8530_bus_ipend() 468 uart_setreg(bas, REG_CTRL, CR_RSTXSI); in z8530_bus_ipend() 481 uart_setreg(bas, REG_CTRL, CR_RSTERR); in z8530_bus_ipend() 488 uart_setreg(bas, REG_CTRL, CR_RSTIUS); in z8530_bus_ipend() 558 uart_setreg(bas, REG_CTRL, CR_RSTERR); in z8530_bus_receive() 569 uart_setreg(bas, REG_CTRL, CR_RSTERR); in z8530_bus_receive() [all …]
|
| H A D | uart.h | 74 uart_setreg(struct uart_bas *bas, int reg, int value) in uart_setreg() function
|
| /freebsd-13.1/sys/mips/cavium/ |
| H A D | uart_dev_oct16550.c | 121 uart_setreg(bas, REG_LCR, lcr); in oct16550_delay() 218 uart_setreg(bas, REG_FCR, fcr); in oct16550_flush() 256 uart_setreg(bas, REG_LCR, lcr); in oct16550_param() 308 uart_setreg(bas, REG_IER, ier); in oct16550_init() 327 uart_setreg(bas, REG_MCR, 0); in oct16550_term() 346 uart_setreg(bas, REG_DATA, c); in oct16550_putc() 479 uart_setreg(bas, REG_IER, ier); in oct16550_bus_detach() 543 uart_setreg(bas, REG_LCR, lcr); in oct16550_bus_ioctl() 556 uart_setreg(bas, REG_EFR, efr); in oct16550_bus_ioctl() 558 uart_setreg(bas, REG_LCR, lcr); in oct16550_bus_ioctl() [all …]
|
| /freebsd-13.1/sys/arm/freescale/vybrid/ |
| H A D | vf_uart.c | 161 uart_setreg(bas, UART_D, c); in vf_uart_putc() 222 uart_setreg(bas, UART_C2, 0x00); in uart_reinit() 224 uart_setreg(bas, UART_C1, 0x00); in uart_reinit() 232 uart_setreg(bas, UART_BDH, reg); in uart_reinit() 235 uart_setreg(bas, UART_BDL, reg); in uart_reinit() 240 uart_setreg(bas, UART_C4, reg); in uart_reinit() 244 uart_setreg(bas, UART_C2, reg); in uart_reinit() 310 uart_setreg(bas, UART_C2, reg); in vf_uart_bus_attach() 384 uart_setreg(bas, UART_S2, usr2); in vf_uart_bus_ipend() 466 uart_setreg(bas, UART_C2, reg); in vf_uart_bus_receive() [all …]
|
| /freebsd-13.1/sys/riscv/sifive/ |
| H A D | sifive_uart.c | 105 uart_setreg(bas, SFUART_IRQ_ENABLE, 0); in sfuart_init() 111 uart_setreg(bas, SFUART_RXCTRL, reg); in sfuart_init() 120 uart_setreg(bas, SFUART_TXCTRL, reg); in sfuart_init() 134 uart_setreg(bas, SFUART_TXDATA, c); in sfuart_putc() 225 uart_setreg(bas, SFUART_RXCTRL, reg); in sfuart_bus_attach() 229 uart_setreg(bas, SFUART_TXCTRL, reg); in sfuart_bus_attach() 247 uart_setreg(bas, SFUART_RXCTRL, 0); in sfuart_bus_detach() 248 uart_setreg(bas, SFUART_TXCTRL, 0); in sfuart_bus_detach() 251 uart_setreg(bas, SFUART_IRQ_ENABLE, 0); in sfuart_bus_detach() 379 uart_setreg(bas, SFUART_IRQ_ENABLE, ie); in sfuart_bus_ipend() [all …]
|
| /freebsd-13.1/sys/mips/mediatek/ |
| H A D | uart_dev_mtk.c | 130 uart_setreg(bas, UART_LCR_REG, databits | in mtk_uart_init() 139 uart_setreg(bas, UART_MCR_REG, 0); in mtk_uart_term() 150 uart_setreg(bas, UART_TX_REG, c); in mtk_uart_putc() 261 uart_setreg(bas, UART_IER_REG, cr); in mtk_uart_disable_txintr() 276 uart_setreg(bas, UART_IER_REG, cr); in mtk_uart_enable_txintr() 307 uart_setreg(bas, UART_FCR_REG, in mtk_uart_bus_attach() 313 uart_setreg(bas, UART_IER_REG, in mtk_uart_bus_attach() 340 uart_setreg(bas, UART_FCR_REG, fcr); in mtk_uart_bus_flush() 409 uart_setreg(&sc->sc_bas, UART_LSR_REG, lsr); in mtk_uart_bus_ipend() 411 uart_setreg(&sc->sc_bas, UART_MSR_REG, msr); in mtk_uart_bus_ipend() [all …]
|
| H A D | uart_dev_mtk.h | 37 #undef uart_setreg 40 #define uart_setreg(bas, reg, value) \ macro
|
| /freebsd-13.1/sys/arm/nvidia/ |
| H A D | tegra_uart.c | 84 uart_setreg(bas, REG_IER, ns8250->ier); in tegra_uart_attach() 103 uart_setreg(bas, REG_IER, ier & ns8250->ier_mask); in tegra_uart_grab() 108 uart_setreg(bas, REG_FCR, 0); in tegra_uart_grab() 123 uart_setreg(bas, REG_FCR, ns8250->fcr); in tegra_uart_ungrab() 124 uart_setreg(bas, REG_IER, ns8250->ier); in tegra_uart_ungrab()
|
| /freebsd-13.1/sys/mips/ingenic/ |
| H A D | jz4780_uart.c | 81 uart_setreg(bas, REG_IER, ns8250->ier); in jz4780_bus_attach()
|
| /freebsd-13.1/sys/mips/atheros/ |
| H A D | uart_dev_ar933x.c | 647 uart_setreg(bas, REG_MCR, ns8250->mcr); in ar933x_bus_setsig()
|