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Searched refs:setTargetDAGCombine (Results 1 – 20 of 20) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp157 setTargetDAGCombine(ISD::VECTOR_SHUFFLE); in WebAssemblyTargetLowering()
160 setTargetDAGCombine(ISD::SIGN_EXTEND); in WebAssemblyTargetLowering()
161 setTargetDAGCombine(ISD::ZERO_EXTEND); in WebAssemblyTargetLowering()
165 setTargetDAGCombine(ISD::SINT_TO_FP); in WebAssemblyTargetLowering()
166 setTargetDAGCombine(ISD::UINT_TO_FP); in WebAssemblyTargetLowering()
167 setTargetDAGCombine(ISD::FP_EXTEND); in WebAssemblyTargetLowering()
168 setTargetDAGCombine(ISD::EXTRACT_SUBVECTOR); in WebAssemblyTargetLowering()
172 setTargetDAGCombine(ISD::FP_TO_SINT_SAT); in WebAssemblyTargetLowering()
173 setTargetDAGCombine(ISD::FP_TO_UINT_SAT); in WebAssemblyTargetLowering()
174 setTargetDAGCombine(ISD::FP_ROUND); in WebAssemblyTargetLowering()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp837 setTargetDAGCombine(ISD::ADD); in SITargetLowering()
839 setTargetDAGCombine(ISD::SUB); in SITargetLowering()
841 setTargetDAGCombine(ISD::FADD); in SITargetLowering()
842 setTargetDAGCombine(ISD::FSUB); in SITargetLowering()
847 setTargetDAGCombine(ISD::FMA); in SITargetLowering()
848 setTargetDAGCombine(ISD::SMIN); in SITargetLowering()
849 setTargetDAGCombine(ISD::SMAX); in SITargetLowering()
850 setTargetDAGCombine(ISD::UMIN); in SITargetLowering()
853 setTargetDAGCombine(ISD::AND); in SITargetLowering()
854 setTargetDAGCombine(ISD::OR); in SITargetLowering()
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H A DAMDGPUISelLowering.cpp596 setTargetDAGCombine(ISD::SHL); in AMDGPUTargetLowering()
597 setTargetDAGCombine(ISD::SRA); in AMDGPUTargetLowering()
598 setTargetDAGCombine(ISD::SRL); in AMDGPUTargetLowering()
600 setTargetDAGCombine(ISD::MUL); in AMDGPUTargetLowering()
601 setTargetDAGCombine(ISD::MULHU); in AMDGPUTargetLowering()
602 setTargetDAGCombine(ISD::MULHS); in AMDGPUTargetLowering()
605 setTargetDAGCombine(ISD::STORE); in AMDGPUTargetLowering()
606 setTargetDAGCombine(ISD::FADD); in AMDGPUTargetLowering()
607 setTargetDAGCombine(ISD::FSUB); in AMDGPUTargetLowering()
608 setTargetDAGCombine(ISD::FNEG); in AMDGPUTargetLowering()
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H A DR600ISelLowering.cpp249 setTargetDAGCombine(ISD::FP_ROUND); in R600TargetLowering()
250 setTargetDAGCombine(ISD::FP_TO_SINT); in R600TargetLowering()
251 setTargetDAGCombine(ISD::EXTRACT_VECTOR_ELT); in R600TargetLowering()
252 setTargetDAGCombine(ISD::SELECT_CC); in R600TargetLowering()
253 setTargetDAGCombine(ISD::INSERT_VECTOR_ELT); in R600TargetLowering()
254 setTargetDAGCombine(ISD::LOAD); in R600TargetLowering()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp141 setTargetDAGCombine(ISD::ADD); in LanaiTargetLowering()
142 setTargetDAGCombine(ISD::SUB); in LanaiTargetLowering()
143 setTargetDAGCombine(ISD::AND); in LanaiTargetLowering()
144 setTargetDAGCombine(ISD::OR); in LanaiTargetLowering()
145 setTargetDAGCombine(ISD::XOR); in LanaiTargetLowering()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp102 setTargetDAGCombine(ISD::SHL); in MipsSETargetLowering()
103 setTargetDAGCombine(ISD::SRA); in MipsSETargetLowering()
104 setTargetDAGCombine(ISD::SRL); in MipsSETargetLowering()
105 setTargetDAGCombine(ISD::SETCC); in MipsSETargetLowering()
106 setTargetDAGCombine(ISD::VSELECT); in MipsSETargetLowering()
164 setTargetDAGCombine(ISD::AND); in MipsSETargetLowering()
165 setTargetDAGCombine(ISD::OR); in MipsSETargetLowering()
166 setTargetDAGCombine(ISD::SRA); in MipsSETargetLowering()
167 setTargetDAGCombine(ISD::VSELECT); in MipsSETargetLowering()
168 setTargetDAGCombine(ISD::XOR); in MipsSETargetLowering()
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H A DMipsISelLowering.cpp497 setTargetDAGCombine(ISD::SDIVREM); in MipsTargetLowering()
498 setTargetDAGCombine(ISD::UDIVREM); in MipsTargetLowering()
499 setTargetDAGCombine(ISD::SELECT); in MipsTargetLowering()
500 setTargetDAGCombine(ISD::AND); in MipsTargetLowering()
501 setTargetDAGCombine(ISD::OR); in MipsTargetLowering()
502 setTargetDAGCombine(ISD::ADD); in MipsTargetLowering()
503 setTargetDAGCombine(ISD::SUB); in MipsTargetLowering()
504 setTargetDAGCombine(ISD::AssertZext); in MipsTargetLowering()
505 setTargetDAGCombine(ISD::SHL); in MipsTargetLowering()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp643 setTargetDAGCombine(ISD::LOAD); in SystemZTargetLowering()
644 setTargetDAGCombine(ISD::STORE); in SystemZTargetLowering()
647 setTargetDAGCombine(ISD::FP_ROUND); in SystemZTargetLowering()
649 setTargetDAGCombine(ISD::FP_EXTEND); in SystemZTargetLowering()
650 setTargetDAGCombine(ISD::SINT_TO_FP); in SystemZTargetLowering()
651 setTargetDAGCombine(ISD::UINT_TO_FP); in SystemZTargetLowering()
653 setTargetDAGCombine(ISD::BSWAP); in SystemZTargetLowering()
654 setTargetDAGCombine(ISD::SDIV); in SystemZTargetLowering()
655 setTargetDAGCombine(ISD::UDIV); in SystemZTargetLowering()
656 setTargetDAGCombine(ISD::SREM); in SystemZTargetLowering()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp962 setTargetDAGCombine(ISD::SHL); in ARMTargetLowering()
963 setTargetDAGCombine(ISD::SRL); in ARMTargetLowering()
964 setTargetDAGCombine(ISD::SRA); in ARMTargetLowering()
995 setTargetDAGCombine(ISD::ADD); in ARMTargetLowering()
1520 setTargetDAGCombine(ISD::ADD); in ARMTargetLowering()
1521 setTargetDAGCombine(ISD::SUB); in ARMTargetLowering()
1522 setTargetDAGCombine(ISD::MUL); in ARMTargetLowering()
1523 setTargetDAGCombine(ISD::AND); in ARMTargetLowering()
1524 setTargetDAGCombine(ISD::OR); in ARMTargetLowering()
1525 setTargetDAGCombine(ISD::XOR); in ARMTargetLowering()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp502 setTargetDAGCombine(ISD::ADD); in NVPTXTargetLowering()
503 setTargetDAGCombine(ISD::AND); in NVPTXTargetLowering()
504 setTargetDAGCombine(ISD::FADD); in NVPTXTargetLowering()
505 setTargetDAGCombine(ISD::MUL); in NVPTXTargetLowering()
506 setTargetDAGCombine(ISD::SHL); in NVPTXTargetLowering()
507 setTargetDAGCombine(ISD::SREM); in NVPTXTargetLowering()
508 setTargetDAGCombine(ISD::UREM); in NVPTXTargetLowering()
513 setTargetDAGCombine(ISD::SETCC); in NVPTXTargetLowering()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp170 setTargetDAGCombine(ISD::STORE); in XCoreTargetLowering()
171 setTargetDAGCombine(ISD::ADD); in XCoreTargetLowering()
172 setTargetDAGCombine(ISD::INTRINSIC_VOID); in XCoreTargetLowering()
173 setTargetDAGCombine(ISD::INTRINSIC_W_CHAIN); in XCoreTargetLowering()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp877 setTargetDAGCombine(ISD::OR); in AArch64TargetLowering()
879 setTargetDAGCombine(ISD::AND); in AArch64TargetLowering()
883 setTargetDAGCombine(ISD::ADD); in AArch64TargetLowering()
884 setTargetDAGCombine(ISD::ABS); in AArch64TargetLowering()
885 setTargetDAGCombine(ISD::SUB); in AArch64TargetLowering()
886 setTargetDAGCombine(ISD::SRL); in AArch64TargetLowering()
887 setTargetDAGCombine(ISD::XOR); in AArch64TargetLowering()
894 setTargetDAGCombine(ISD::FDIV); in AArch64TargetLowering()
897 setTargetDAGCombine(ISD::SETCC); in AArch64TargetLowering()
908 setTargetDAGCombine(ISD::STORE); in AArch64TargetLowering()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp1312 setTargetDAGCombine(ISD::ADD); in PPCTargetLowering()
1313 setTargetDAGCombine(ISD::SHL); in PPCTargetLowering()
1314 setTargetDAGCombine(ISD::SRA); in PPCTargetLowering()
1315 setTargetDAGCombine(ISD::SRL); in PPCTargetLowering()
1316 setTargetDAGCombine(ISD::MUL); in PPCTargetLowering()
1317 setTargetDAGCombine(ISD::FMA); in PPCTargetLowering()
1322 setTargetDAGCombine(ISD::LOAD); in PPCTargetLowering()
1323 setTargetDAGCombine(ISD::STORE); in PPCTargetLowering()
1324 setTargetDAGCombine(ISD::BR_CC); in PPCTargetLowering()
1327 setTargetDAGCombine(ISD::BSWAP); in PPCTargetLowering()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp858 setTargetDAGCombine(ISD::AND); in RISCVTargetLowering()
859 setTargetDAGCombine(ISD::OR); in RISCVTargetLowering()
860 setTargetDAGCombine(ISD::XOR); in RISCVTargetLowering()
861 setTargetDAGCombine(ISD::ANY_EXTEND); in RISCVTargetLowering()
862 setTargetDAGCombine(ISD::ZERO_EXTEND); in RISCVTargetLowering()
864 setTargetDAGCombine(ISD::FCOPYSIGN); in RISCVTargetLowering()
865 setTargetDAGCombine(ISD::MGATHER); in RISCVTargetLowering()
866 setTargetDAGCombine(ISD::MSCATTER); in RISCVTargetLowering()
867 setTargetDAGCombine(ISD::SRA); in RISCVTargetLowering()
868 setTargetDAGCombine(ISD::SRL); in RISCVTargetLowering()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp2018 setTargetDAGCombine(ISD::SHL); in X86TargetLowering()
2019 setTargetDAGCombine(ISD::SRA); in X86TargetLowering()
2020 setTargetDAGCombine(ISD::SRL); in X86TargetLowering()
2021 setTargetDAGCombine(ISD::OR); in X86TargetLowering()
2022 setTargetDAGCombine(ISD::AND); in X86TargetLowering()
2023 setTargetDAGCombine(ISD::ADD); in X86TargetLowering()
2024 setTargetDAGCombine(ISD::FADD); in X86TargetLowering()
2027 setTargetDAGCombine(ISD::FMA); in X86TargetLowering()
2031 setTargetDAGCombine(ISD::SUB); in X86TargetLowering()
2049 setTargetDAGCombine(ISD::MUL); in X86TargetLowering()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLoweringHVX.cpp269 setTargetDAGCombine(ISD::SPLAT_VECTOR); in initializeHVXLowering()
270 setTargetDAGCombine(ISD::VSELECT); in initializeHVXLowering()
H A DHexagonISelLowering.cpp1806 setTargetDAGCombine(ISD::VSELECT); in HexagonTargetLowering()
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetLowering.h2282 void setTargetDAGCombine(ISD::NodeType NT) { in setTargetDAGCombine() function
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEISelLowering.cpp869 setTargetDAGCombine(ISD::TRUNCATE); in VETargetLowering()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp1813 setTargetDAGCombine(ISD::BITCAST); in SparcTargetLowering()