Lines Matching refs:setTargetDAGCombine

789     setTargetDAGCombine(ISD::BRCOND);  in ARMTargetLowering()
790 setTargetDAGCombine(ISD::BR_CC); in ARMTargetLowering()
962 setTargetDAGCombine(ISD::SHL); in ARMTargetLowering()
963 setTargetDAGCombine(ISD::SRL); in ARMTargetLowering()
964 setTargetDAGCombine(ISD::SRA); in ARMTargetLowering()
965 setTargetDAGCombine(ISD::FP_TO_SINT); in ARMTargetLowering()
966 setTargetDAGCombine(ISD::FP_TO_UINT); in ARMTargetLowering()
967 setTargetDAGCombine(ISD::FDIV); in ARMTargetLowering()
968 setTargetDAGCombine(ISD::LOAD); in ARMTargetLowering()
982 setTargetDAGCombine(ISD::BUILD_VECTOR); in ARMTargetLowering()
983 setTargetDAGCombine(ISD::VECTOR_SHUFFLE); in ARMTargetLowering()
984 setTargetDAGCombine(ISD::INSERT_VECTOR_ELT); in ARMTargetLowering()
985 setTargetDAGCombine(ISD::EXTRACT_VECTOR_ELT); in ARMTargetLowering()
986 setTargetDAGCombine(ISD::SIGN_EXTEND_INREG); in ARMTargetLowering()
987 setTargetDAGCombine(ISD::STORE); in ARMTargetLowering()
988 setTargetDAGCombine(ISD::SIGN_EXTEND); in ARMTargetLowering()
989 setTargetDAGCombine(ISD::ZERO_EXTEND); in ARMTargetLowering()
990 setTargetDAGCombine(ISD::ANY_EXTEND); in ARMTargetLowering()
991 setTargetDAGCombine(ISD::INTRINSIC_WO_CHAIN); in ARMTargetLowering()
992 setTargetDAGCombine(ISD::INTRINSIC_W_CHAIN); in ARMTargetLowering()
993 setTargetDAGCombine(ISD::INTRINSIC_VOID); in ARMTargetLowering()
994 setTargetDAGCombine(ISD::VECREDUCE_ADD); in ARMTargetLowering()
995 setTargetDAGCombine(ISD::ADD); in ARMTargetLowering()
996 setTargetDAGCombine(ISD::BITCAST); in ARMTargetLowering()
999 setTargetDAGCombine(ISD::SMIN); in ARMTargetLowering()
1000 setTargetDAGCombine(ISD::UMIN); in ARMTargetLowering()
1001 setTargetDAGCombine(ISD::SMAX); in ARMTargetLowering()
1002 setTargetDAGCombine(ISD::UMAX); in ARMTargetLowering()
1003 setTargetDAGCombine(ISD::FP_EXTEND); in ARMTargetLowering()
1004 setTargetDAGCombine(ISD::SELECT); in ARMTargetLowering()
1005 setTargetDAGCombine(ISD::SELECT_CC); in ARMTargetLowering()
1520 setTargetDAGCombine(ISD::ADD); in ARMTargetLowering()
1521 setTargetDAGCombine(ISD::SUB); in ARMTargetLowering()
1522 setTargetDAGCombine(ISD::MUL); in ARMTargetLowering()
1523 setTargetDAGCombine(ISD::AND); in ARMTargetLowering()
1524 setTargetDAGCombine(ISD::OR); in ARMTargetLowering()
1525 setTargetDAGCombine(ISD::XOR); in ARMTargetLowering()
1528 setTargetDAGCombine(ISD::VSELECT); in ARMTargetLowering()
1531 setTargetDAGCombine(ISD::SRL); in ARMTargetLowering()
1533 setTargetDAGCombine(ISD::SHL); in ARMTargetLowering()
1563 setTargetDAGCombine(ISD::ABS); in ARMTargetLowering()