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Searched refs:isPre (Results 1 – 8 of 8) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelDAGToDAG.cpp135 bool isPre = (AM == ISD::PRE_DEC); in selectIndexedLoad() local
140 if ((!isPre && Offs != 1) || (isPre && Offs != -1)) { in selectIndexedLoad()
144 Opcode = (isPre) ? AVR::LDRdPtrPd : AVR::LDRdPtrPi; in selectIndexedLoad()
148 if ((!isPre && Offs != 2) || (isPre && Offs != -2)) { in selectIndexedLoad()
152 Opcode = (isPre) ? AVR::LDWRdPtrPd : AVR::LDWRdPtrPi; in selectIndexedLoad()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp1595 if (LoadedVT == MVT::i32 && isPre && in tryARMIndexedLoad()
1599 } else if (LoadedVT == MVT::i32 && !isPre && in tryARMIndexedLoad()
1605 Opcode = isPre ? ARM::LDR_PRE_REG : ARM::LDR_POST_REG; in tryARMIndexedLoad()
1612 ? (isPre ? ARM::LDRSH_PRE : ARM::LDRSH_POST) in tryARMIndexedLoad()
1613 : (isPre ? ARM::LDRH_PRE : ARM::LDRH_POST); in tryARMIndexedLoad()
1621 if (isPre && in tryARMIndexedLoad()
1625 } else if (!isPre && in tryARMIndexedLoad()
1705 Opcode = isPre ? ARM::t2LDR_PRE : ARM::t2LDR_POST; in tryT2IndexedLoad()
1744 bool isSExtLd, isPre; in tryMVEIndexedLoad() local
1763 isPre = (AM == ISD::PRE_INC) || (AM == ISD::PRE_DEC); in tryMVEIndexedLoad()
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H A DARMInstrFormats.td778 class AI2ldstidx<bit isLd, bit isByte, bit isPre, dag oops, dag iops,
785 let Inst{24} = isPre; // P bit
787 let Inst{21} = isPre; // W bit
791 class AI2stridx_reg<bit isByte, bit isPre, dag oops, dag iops,
794 : AI2ldstidx<0, isByte, isPre, oops, iops, im, f, itin, opc, asm, cstr,
809 class AI2stridx_imm<bit isByte, bit isPre, dag oops, dag iops,
812 : AI2ldstidx<0, isByte, isPre, oops, iops, im, f, itin, opc, asm, cstr,
828 class AI2stridxT<bit isByte, bit isPre, dag oops, dag iops,
867 class AI3ldstidx<bits<4> op, bit op20, bit isPre, dag oops, dag iops,
874 let Inst{24} = isPre; // P bit
[all …]
H A DARMBaseInstrInfo.cpp185 bool isPre = false; in convertToThreeAddress() local
189 isPre = true; in convertToThreeAddress()
274 if (isPre) { in convertToThreeAddress()
/freebsd-13.1/contrib/llvm-project/clang/lib/CodeGen/
H A DCGExprScalar.cpp607 bool isInc, bool isPre);
2454 bool isInc, bool isPre) { in EmitScalarPrePostIncDec() argument
2468 if (isPre) { in EmitScalarPrePostIncDec()
2496 return isPre ? Builder.CreateBinOp(op, old, amt) : old; in EmitScalarPrePostIncDec()
2743 return isPre ? value : input; in EmitScalarPrePostIncDec()
2754 return isPre ? value : input; in EmitScalarPrePostIncDec()
4839 bool isInc, bool isPre) { in EmitScalarPrePostIncDec() argument
4840 return ScalarExprEmitter(*this).EmitScalarPrePostIncDec(E, LV, isInc, isPre); in EmitScalarPrePostIncDec()
H A DCGExprComplex.cpp192 bool isInc, bool isPre) { in VisitPrePostIncDec() argument
194 return CGF.EmitComplexPrePostIncDec(E, LV, isInc, isPre); in VisitPrePostIncDec()
H A DCodeGenFunction.h2956 bool isInc, bool isPre);
2958 bool isInc, bool isPre);
H A DCGExpr.cpp1022 bool isInc, bool isPre) { in EmitComplexPrePostIncDec() argument
1053 return isPre ? IncVal : InVal; in EmitComplexPrePostIncDec()