Searched refs:has16BitInsts (Results 1 – 8 of 8) sorted by relevance
338 return (ElemWidth == 16 && ST->has16BitInsts()) ? 2 in getMaximumVF()590 if (ST->has16BitInsts() && SLT == MVT::i16) in getArithmeticInstrCost()605 if (ST->has16BitInsts() && SLT == MVT::i16) in getArithmeticInstrCost()616 if (ST->has16BitInsts() && SLT == MVT::i16) in getArithmeticInstrCost()632 if (ST->has16BitInsts() && SLT == MVT::f16 && !HasFP64FP16Denormals) in getArithmeticInstrCost()651 if (ST->has16BitInsts() && SLT == MVT::f16) in getArithmeticInstrCost()675 (SLT == MVT::f16 && ST->has16BitInsts())) { in getArithmeticInstrCost()680 if (SLT == MVT::f16 && ST->has16BitInsts()) { in getArithmeticInstrCost()789 if ((ST->has16BitInsts() && SLT == MVT::f16) || in getIntrinsicInstrCost()885 if (EltSize == 16 && Index == 0 && ST->has16BitInsts()) in getVectorInstrCost()
133 bool has16BitInsts() const { in has16BitInsts() function
498 if (Size <= 16 && ST->has16BitInsts()) in replaceMulWithMul24()750 if (Ty->isHalfTy() && !ST->has16BitInsts()) in visitFDiv()1216 if (ST->has16BitInsts() && needsPromotionToI32(I.getType()) && in visitBinaryOperator()1346 if (ST->has16BitInsts() && needsPromotionToI32(I.getOperand(0)->getType()) && in visitICmpInst()1356 if (ST->has16BitInsts() && needsPromotionToI32(I.getType()) && in visitSelectInst()1375 if (ST->has16BitInsts() && needsPromotionToI32(I.getType()) && in visitBitreverseIntrinsicInst()
682 if (ST.has16BitInsts()) { in AMDGPULegalizerInfo()732 if (ST.has16BitInsts()) { in AMDGPULegalizerInfo()787 if (ST.has16BitInsts()) { in AMDGPULegalizerInfo()819 if (ST.has16BitInsts()) in AMDGPULegalizerInfo()830 if (ST.has16BitInsts()) in AMDGPULegalizerInfo()845 if (ST.has16BitInsts()) { in AMDGPULegalizerInfo()889 if (ST.has16BitInsts()) { in AMDGPULegalizerInfo()907 if (ST.has16BitInsts()) in AMDGPULegalizerInfo()915 if (ST.has16BitInsts()) in AMDGPULegalizerInfo()963 if (ST.has16BitInsts()) { in AMDGPULegalizerInfo()[all …]
758 (ScalarVT == MVT::f16 && Subtarget->has16BitInsts())); in isFPImmLegal()891 (Subtarget->has16BitInsts() && VT == MVT::f16); in isFAbsFree()934 if (DestSize== 16 && Subtarget->has16BitInsts()) in isTruncateFree()944 if (SrcSize == 16 && Subtarget->has16BitInsts()) in isZExtFree()2581 if (Subtarget->has16BitInsts() && DestVT == MVT::f16) { in LowerUINT_TO_FP()2620 if (Subtarget->has16BitInsts() && DestVT == MVT::f16) { in LowerSINT_TO_FP()3419 if (Subtarget->has16BitInsts() && VT.getScalarType().bitsLE(MVT::i16)) in performMulCombine()3535 if (LegalVT != MVT::i32 && (Subtarget->has16BitInsts() && in getFFBX_U32()3982 assert(!Subtarget->has16BitInsts() && "should only see if f16 is illegal"); in performFAbsCombine()
129 if (Subtarget->has16BitInsts()) { in SITargetLowering()445 if (Subtarget->has16BitInsts()) { in SITargetLowering()531 if (Subtarget->has16BitInsts()) { in SITargetLowering()785 if (Subtarget->has16BitInsts()) { in SITargetLowering()932 if (Subtarget->has16BitInsts()) in getRegisterTypeForCallingConv()960 if (Size == 16 && Subtarget->has16BitInsts()) in getNumRegistersForCallingConv()985 if (Size == 16 && Subtarget->has16BitInsts()) { in getVectorTypeBreakdownForCallingConv()999 if (Size < 16 && Subtarget->has16BitInsts()) { in getVectorTypeBreakdownForCallingConv()1624 if (Subtarget->has16BitInsts() && VT == MVT::i16) { in isTypeDesirableForOp()9389 if (!Subtarget->has16BitInsts() || in performZeroExtendCombine()[all …]
1362 def Has16BitInsts : Predicate<"Subtarget->has16BitInsts()">,
3361 return ST.has16BitInsts() && in isInlineConstant()3431 return ST.has16BitInsts() && in isInlineConstant()