| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelDAGToDAG.cpp | 885 MVT SimpleVT = LoadedVT.getSimpleVT(); in tryLoad() 1023 MVT SimpleVT = LoadedVT.getSimpleVT(); in tryLoadVector() 1076 Opcode = pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, in tryLoadVector() 1103 Opcode = pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, in tryLoadVector() 1320 Opcode = pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, in tryLDGLDU() 1331 Opcode = pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, in tryLDGLDU() 1343 Opcode = pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, in tryLDGLDU() 1352 Opcode = pickOpcodeForVT(EltVT.getSimpleVT().SimpleTy, in tryLDGLDU() 1743 MVT SimpleVT = StoreVT.getSimpleVT(); in tryStore() 1901 MVT ScalarVT = StoreVT.getSimpleVT().getScalarType(); in tryStoreVector() [all …]
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| /freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ValueTypes.h | 96 return getSimpleVT().changeVectorElementTypeToInteger(); in changeVectorElementTypeToInteger() 106 return getSimpleVT().changeVectorElementType(EltVT.getSimpleVT()); in changeVectorElementType() 119 return getSimpleVT().changeTypeToInteger(); in changeTypeToInteger() 289 MVT getSimpleVT() const { in getSimpleVT() function
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| H A D | TargetLowering.h | 554 MVT LoadMVT = LoadVT.getSimpleVT(); in isLoadBitCastBeneficial() 1051 return OpActions[(unsigned)VT.getSimpleVT().SimpleTy][Op]; in getOperationAction() 1228 unsigned ValI = (unsigned) ValVT.getSimpleVT().SimpleTy; in getLoadExtAction() 1229 unsigned MemI = (unsigned) MemVT.getSimpleVT().SimpleTy; in getLoadExtAction() 1253 unsigned ValI = (unsigned) ValVT.getSimpleVT().SimpleTy; in getTruncStoreAction() 1254 unsigned MemI = (unsigned) MemVT.getSimpleVT().SimpleTy; in getTruncStoreAction() 1450 return getValueType(DL, Ty, AllowUnknown).getSimpleVT(); 1467 assert((unsigned)VT.getSimpleVT().SimpleTy < in getRegisterType() 1469 return RegisterTypeForVT[VT.getSimpleVT().SimpleTy]; in getRegisterType() 1500 assert((unsigned)VT.getSimpleVT().SimpleTy < [all …]
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| H A D | TargetCallingConv.h | 215 VT = vt.getSimpleVT(); in InputArg() 254 VT = vt.getSimpleVT(); in OutputArg()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 250 MVT VT = RealVT.getSimpleVT(); in getRegForValue() 482 VT.getSimpleVT()); in selectBinaryOp() 528 Register ResultReg = fastEmit_rr(VT.getSimpleVT(), VT.getSimpleVT(), in selectBinaryOp() 1396 Register ResultReg = fastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), in selectCast() 1423 MVT SrcVT = SrcEVT.getSimpleVT(); in selectBitCast() 1424 MVT DstVT = DstEVT.getSimpleVT(); in selectBitCast() 1464 MVT Ty = ETy.getSimpleVT(); in selectFreeze() 1623 Register ResultReg = fastEmit_r(VT.getSimpleVT(), VT.getSimpleVT(), ISD::FNEG, in selectFNeg() 1638 Register IntReg = fastEmit_r(VT.getSimpleVT(), IntVT.getSimpleVT(), in selectFNeg() 1649 ResultReg = fastEmit_r(IntVT.getSimpleVT(), VT.getSimpleVT(), ISD::BITCAST, in selectFNeg() [all …]
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| H A D | LegalizeDAG.cpp | 314 SVT = (MVT::SimpleValueType)(SVT.getSimpleVT().SimpleTy - 1); in ExpandConstantFP() 851 SrcVT.getSimpleVT())) { in LegalizeLoadOps() 882 EVT LoadVT = TLI.getRegisterType(SrcVT.getSimpleVT()); in LegalizeLoadOps() 906 EVT ILoadVT = TLI.getRegisterType(IDestVT.getSimpleVT()); in LegalizeLoadOps() 2108 RTLIB::Libcall LC = RTLIB::getFPLibCall(InVT.getSimpleVT(), in ExpandArgFPLibCall() 2450 switch (SrcVT.getSimpleVT().SimpleTy) { in ExpandLegalINT_TO_FP() 2516 NewInTy = (MVT::SimpleValueType)(NewInTy.getSimpleVT().SimpleTy+1); in PromoteLegalINT_TO_FP() 2574 NewOutTy = (MVT::SimpleValueType)(NewOutTy.getSimpleVT().SimpleTy+1); in PromoteLegalFP_TO_INT() 2617 NewOutTy = (MVT::SimpleValueType)(NewOutTy.getSimpleVT().SimpleTy + 1); in PromoteLegalFP_TO_INT_SAT() 3884 MVT VT = cast<AtomicSDNode>(Node)->getMemoryVT().getSimpleVT(); in ConvertNodeToLibcall()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMTargetTransformInfo.cpp | 460 LoadConversionTbl, ISD, DstTy.getSimpleVT(), SrcTy.getSimpleVT())) in getCastInstrCost() 483 DstTy.getSimpleVT(), SrcTy.getSimpleVT())) in getCastInstrCost() 495 DstTy.getSimpleVT(), SrcTy.getSimpleVT())) in getCastInstrCost() 512 SrcTy.getSimpleVT(), DstTy.getSimpleVT())) in getCastInstrCost() 523 SrcTy.getSimpleVT(), DstTy.getSimpleVT())) in getCastInstrCost() 549 DstTy.getSimpleVT(), in getCastInstrCost() 550 SrcTy.getSimpleVT())) { in getCastInstrCost() 660 DstTy.getSimpleVT(), in getCastInstrCost() 661 SrcTy.getSimpleVT())) in getCastInstrCost() 690 DstTy.getSimpleVT(), in getCastInstrCost() [all …]
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| H A D | ARMFastISel.cpp | 631 MVT VT = CEVT.getSimpleVT(); in fastMaterializeConstant() 678 VT = evt.getSimpleVT(); in isTypeLegal() 1339 MVT SrcVT = SrcEVT.getSimpleVT(); in ARMEmitCmp() 1534 MVT SrcVT = SrcEVT.getSimpleVT(); in SelectIToFP() 1776 MVT VT = FPVT.getSimpleVT(); in SelectBinaryFPOp() 2124 MVT RVVT = RVEVT.getSimpleVT(); in SelectRet() 2189 return ARMMaterializeGV(GV, LCREVT.getSimpleVT()); in getLibcallReg() 2756 MVT SrcVT = SrcEVT.getSimpleVT(); in SelectIntExt() 2757 MVT DestVT = DestEVT.getSimpleVT(); in SelectIntExt() 3042 switch (ArgVT.getSimpleVT().SimpleTy) { in fastLowerArguments()
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| H A D | ARMCallLowering.cpp | 75 unsigned VTSize = VT.getSimpleVT().getSizeInBits(); in isSupportedType()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelDAGToDAG.cpp | 305 switch (VT.getSimpleVT().SimpleTy) { in isValidIndexedLoad() 330 MVT VT = LD->getMemoryVT().getSimpleVT(); in tryIndexedLoad() 359 MVT VT = LD->getMemoryVT().getSimpleVT(); in tryIndexedBinOp()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelDAGToDAG.cpp | 107 MVT VT = cast<MemSDNode>(Op)->getMemoryVT().getSimpleVT(); in SelectAddr() 124 MVT VT = LD->getMemoryVT().getSimpleVT(); in selectIndexedLoad() 368 MVT VT = LD->getMemoryVT().getSimpleVT(); in select()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsFastISel.cpp | 452 MVT VT = CEVT.getSimpleVT(); in fastMaterializeConstant() 600 VT = evt.getSimpleVT(); in isTypeLegal() 1371 switch (ArgVT.getSimpleVT().SimpleTy) { in fastLowerArguments() 1740 MVT RVVT = RVEVT.getSimpleVT(); in selectRet() 1819 MVT SrcVT = SrcEVT.getSimpleVT(); in selectIntExt() 1820 MVT DestVT = DestEVT.getSimpleVT(); in selectIntExt() 1920 MVT DestVT = DestEVT.getSimpleVT(); in selectDivRem() 1981 MVT Op0MVT = TLI.getValueType(DL, Op0->getType(), true).getSimpleVT(); in selectShift() 2097 MVT VMVT = TLI.getValueType(DL, V->getType(), true).getSimpleVT(); in getRegEnsuringSimpleIntegerWidening()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelDAGToDAG.cpp | 81 switch (LoadedVT.getSimpleVT().SimpleTy) { in SelectIndexedLoad() 477 switch (StoredVT.getSimpleVT().SimpleTy) { in SelectIndexedStore() 771 MVT ResTy = N->getValueType(0).getSimpleVT(); in SelectVAlign() 834 MVT OpTy = Op.getValueType().getSimpleVT(); in SelectTypecast() 841 MVT ResTy = N->getValueType(0).getSimpleVT(); in SelectP2D() 849 MVT ResTy = N->getValueType(0).getSimpleVT(); in SelectD2P() 858 MVT ResTy = N->getValueType(0).getSimpleVT(); in SelectV2Q() 860 MVT OpTy = N->getOperand(0).getValueType().getSimpleVT(); (void)OpTy; in SelectV2Q() 872 MVT ResTy = N->getValueType(0).getSimpleVT(); in SelectQ2V() 1170 if (!OpVT.isSimple() || OpVT.getSimpleVT() != MVT::i1) in ppHoistZextI1() [all …]
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| H A D | HexagonISelLowering.h | 387 return Op.getValueType().getSimpleVT(); in ty() 390 return { Ops.first.getValueType().getSimpleVT(), in ty() 391 Ops.second.getValueType().getSimpleVT() }; in ty()
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| H A D | HexagonISelDAGToDAGHVX.cpp | 673 : InpNode(Inp), InpTy(Inp->getValueType(0).getSimpleVT()) {} in ResultStack() 1076 MVT OpTy = Op.getValueType().getSimpleVT(); in materialize() 1669 MVT LegalTy = Lower.getTypeToTransformTo(Ctx, ElemTy).getSimpleVT(); in scalarizeShuffle() 2276 MVT ResTy = N->getValueType(0).getSimpleVT(); in selectShuffle() 2348 MVT Ty = N->getValueType(0).getSimpleVT(); in selectRor()
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| H A D | HexagonISelLoweringHVX.cpp | 359 MVT CastTy = tyVector(Vec.getValueType().getSimpleVT(), ElemTy); in opCastElem() 425 if (ElemIdx.getValueType().getSimpleVT() != MVT::i32) in convertToByteIndex() 1776 MVT Ty = typeSplit(N->getVT().getSimpleVT()).first; in SplitHvxPairOp() 1806 MVT MemTy = MemN->getMemoryVT().getSimpleVT(); in SplitHvxMemOp() 2293 return Subtarget.isHVXVectorType(WideTy.getSimpleVT(), true); in shouldWidenToHvx() 2305 return Ty.isSimple() && Subtarget.isHVXVectorType(Ty.getSimpleVT(), true); in isHvxOperation()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FastISel.cpp | 302 VT = evt.getSimpleVT(); in isTypeLegal() 499 switch (VT.getSimpleVT().SimpleTy) { in X86FastEmitStore() 671 switch (VT.getSimpleVT().SimpleTy) { in X86FastEmitStore() 710 unsigned RR = fastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), Opc, Src); in X86FastEmitExtend() 1266 SrcReg = fastEmit_r(SrcVT.getSimpleVT(), DstVT.getSimpleVT(), Op, SrcReg); in X86SelectRet() 1364 switch (VT.getSimpleVT().SimpleTy) { in X86ChooseCmpOpcode() 1387 switch (VT.getSimpleVT().SimpleTy) { in X86ChooseCmpImmediateOpcode() 1590 ResultReg = fastEmit_r(MVT::i8, DstVT.getSimpleVT(), ISD::ZERO_EXTEND, in X86SelectZExt() 2440 MVT DstVT = TLI.getValueType(DL, I->getType()).getSimpleVT(); in X86SelectIntToFP() 3083 switch (ArgVT.getSimpleVT().SimpleTy) { in fastLowerArguments() [all …]
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | InlineAsmLowering.cpp | 329 TLI->getAsmOperandValueType(DL, OpTy, true).getSimpleVT(); in lowerInlineAsm() 339 TLI->getAsmOperandValueType(DL, Call.getType()).getSimpleVT(); in lowerInlineAsm()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCFastISel.cpp | 275 VT = Evt.getSimpleVT(); in isTypeLegal() 825 MVT SrcVT = SrcEVT.getSimpleVT(); in PPCEmitCmp() 1075 MVT SrcVT = SrcEVT.getSimpleVT(); in SelectIToFP() 1752 MVT RVVT = RVEVT.getSimpleVT(); in SelectRet() 1916 MVT SrcVT = SrcEVT.getSimpleVT(); in SelectIntExt() 1917 MVT DestVT = DestEVT.getSimpleVT(); in SelectIntExt() 2255 MVT VT = CEVT.getSimpleVT(); in fastMaterializeConstant()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 959 MVT SVT = VT.getSimpleVT(); in getTypeConversion() 1048 MVT NVT = MVT::getVectorVT(EltVT.getSimpleVT(), NumElts); in getTypeConversion() 1071 MVT LargerVector = MVT::getVectorVT(EltVT.getSimpleVT(), NumElts); in getTypeConversion() 1546 RegisterVT = RegisterEVT.getSimpleVT(); in getVectorTypeBreakdown() 1856 return std::make_pair(Cost, MTy.getSimpleVT()); in getTypeLegalizationCost() 1863 return std::make_pair(Cost, MTy.getSimpleVT()); in getTypeLegalizationCost()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFrameLowering.cpp | 83 FuncInfo->addLocal(ValueVT.getSimpleVT()); in getLocalForStackObject()
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| H A D | WebAssemblyFastISel.cpp | 120 return VT.isSimple() ? VT.getSimpleVT().SimpleTy in getSimpleType() 1170 Register Reg = fastEmit_ISD_BITCAST_r(VT.getSimpleVT(), RetVT.getSimpleVT(), in selectBitCast()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64TargetTransformInfo.cpp | 1174 DstTy.getSimpleVT(), in getCastInstrCost() 1175 SrcTy.getSimpleVT())) in getCastInstrCost() 1476 SelCondTy.getSimpleVT(), in getCmpSelInstrCost() 1477 SelValTy.getSimpleVT())) in getCmpSelInstrCost() 2090 CostTableLookup(ShuffleTbl, TTI::SK_Splice, PromotedVT.getSimpleVT()); in getSpliceCost()
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| H A D | AArch64FastISel.cpp | 516 MVT VT = CEVT.getSimpleVT(); in fastMaterializeConstant() 967 VT = evt.getSimpleVT(); in isTypeLegal() 1453 MVT VT = EVT.getSimpleVT(); in emitCmp() 2856 emitIntExt(SrcVT.getSimpleVT(), SrcReg, MVT::i32, /*isZExt*/ !Signed); in selectIntToFP() 2915 MVT VT = ArgVT.getSimpleVT().SimpleTy; in fastLowerArguments() 3821 MVT RVVT = RVEVT.getSimpleVT(); in selectRet() 3872 MVT SrcVT = SrcEVT.getSimpleVT(); in selectTrunc() 3873 MVT DestVT = DestEVT.getSimpleVT(); in selectTrunc() 4529 MVT DestVT = DestEVT.getSimpleVT(); in selectRem() 4878 IdxN = emitIntExt(IdxVT.getSimpleVT(), IdxN, PtrVT, /*isZExt=*/false); in getRegForGEPIndex()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCISelLowering.cpp | 485 switch (RegVT.getSimpleVT().SimpleTy) { in LowerCallArguments() 488 << (unsigned)RegVT.getSimpleVT().SimpleTy << "\n"); in LowerCallArguments()
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