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Searched refs:getKillRegState (Results 1 – 25 of 67) sorted by relevance

123

/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRExpandPseudoInsts.cpp168 .addReg(DstLoReg, getKillRegState(DstIsKill)) in expandArith()
169 .addReg(SrcLoReg, getKillRegState(SrcIsKill)); in expandArith()
173 .addReg(DstHiReg, getKillRegState(DstIsKill)) in expandArith()
174 .addReg(SrcHiReg, getKillRegState(SrcIsKill)); in expandArith()
201 .addReg(DstLoReg, getKillRegState(DstIsKill)) in expandLogic()
202 .addReg(SrcLoReg, getKillRegState(SrcIsKill)); in expandLogic()
209 .addReg(DstHiReg, getKillRegState(DstIsKill)) in expandLogic()
354 .addReg(DstLoReg, getKillRegState(SrcIsKill)) in expand()
660 .addReg(SrcReg, getKillRegState(SrcIsKill)) in expand()
777 .addReg(SrcReg, getKillRegState(SrcIsKill)) in expand()
[all …]
H A DAVRRelaxMemOperations.cpp112 .addReg(Src.getReg(), getKillRegState(Src.isKill())); in relax()
116 .addDef(Ptr.getReg(), getKillRegState(Ptr.isKill())); in relax()
H A DAVRInstrInfo.cpp53 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
62 .addReg(SrcLo, getKillRegState(KillSrc)); in copyPhysReg()
64 .addReg(SrcHi, getKillRegState(KillSrc)); in copyPhysReg()
78 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
155 .addReg(SrcReg, getKillRegState(isKill)) in storeRegToStackSlot()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcInstrInfo.cpp323 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
331 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
335 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
346 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
363 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
367 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
411 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO); in storeRegToStackSlot()
414 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO); in storeRegToStackSlot()
417 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO); in storeRegToStackSlot()
420 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO); in storeRegToStackSlot()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DThumb1InstrInfo.cpp53 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
63 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
71 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
98 .addReg(SrcReg, getKillRegState(isKill)) in storeRegToStackSlot()
H A DMLxExpansionPass.cpp291 .addReg(Src1Reg, getKillRegState(Src1Kill)) in ExpandFPMLxInstruction()
292 .addReg(Src2Reg, getKillRegState(Src2Kill)); in ExpandFPMLxInstruction()
302 MIB.addReg(TmpReg, getKillRegState(true)) in ExpandFPMLxInstruction()
303 .addReg(AccReg, getKillRegState(AccKill)); in ExpandFPMLxInstruction()
305 MIB.addReg(AccReg).addReg(TmpReg, getKillRegState(true)); in ExpandFPMLxInstruction()
H A DARMLoadStoreOptimizer.cpp744 .addReg(Base, getKillRegState(KillOldBase)); in CreateLoadStoreMulti()
747 .addReg(Base, getKillRegState(KillOldBase)) in CreateLoadStoreMulti()
757 .addReg(Base, getKillRegState(KillOldBase)) in CreateLoadStoreMulti()
763 .addReg(Base, getKillRegState(KillOldBase)) in CreateLoadStoreMulti()
768 .addReg(Base, getKillRegState(KillOldBase)) in CreateLoadStoreMulti()
810 .addReg(Base, getKillRegState(BaseKill)); in CreateLoadStoreMulti()
819 MIB.addReg(Base, getKillRegState(BaseKill)); in CreateLoadStoreMulti()
849 MIB.addReg(Regs[0].first, getKillRegState(Regs[0].second)) in CreateLoadStoreDouble()
1349 .addReg(Base, getKillRegState(BaseKill)) in MergeBaseUpdateLSMultiple()
1809 .addReg(BaseReg, getKillRegState(BaseKill)) in FixInvalidRegPairOp()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFInstrInfo.cpp37 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
40 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
135 .addReg(SrcReg, getKillRegState(IsKill)) in storeRegToStackSlot()
140 .addReg(SrcReg, getKillRegState(IsKill)) in storeRegToStackSlot()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrBuilder.h159 return addOffset(MIB.addReg(Reg, getKillRegState(isKill)), Offset); in addRegOffset()
167 return MIB.addReg(Reg1, getKillRegState(isKill1)).addImm(1) in addRegReg()
168 .addReg(Reg2, getKillRegState(isKill2)).addImm(0).addReg(0); in addRegReg()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEISelLowering.cpp1823 .addReg(Tmp1, getKillRegState(true)) in prepareMBB()
1827 .addReg(Tmp2, getKillRegState(true)) in prepareMBB()
1839 .addReg(Tmp1, getKillRegState(true)) in prepareMBB()
1842 .addReg(Tmp2, getKillRegState(true)) in prepareMBB()
1927 .addReg(Tmp1, getKillRegState(true)) in prepareSymbol()
1930 .addReg(Tmp2, getKillRegState(true)) in prepareSymbol()
2145 .addReg(Tmp, getKillRegState(true)) in emitEHSjLjLongJmp()
2251 .addReg(Abort, getKillRegState(true)) in emitSjLjDispatchBlock()
2315 .addReg(Tmp1, getKillRegState(true)) in emitSjLjDispatchBlock()
2319 .addReg(Tmp2, getKillRegState(true)) in emitSjLjDispatchBlock()
[all …]
H A DVEInstrInfo.cpp366 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
384 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
385 .addReg(SubTmp, getKillRegState(true)); in copyPhysReg()
390 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
476 .addReg(SrcReg, getKillRegState(isKill)) in storeRegToStackSlot()
483 .addReg(SrcReg, getKillRegState(isKill)) in storeRegToStackSlot()
490 .addReg(SrcReg, getKillRegState(isKill)) in storeRegToStackSlot()
497 .addReg(SrcReg, getKillRegState(isKill)) in storeRegToStackSlot()
899 .addReg(Src, getKillRegState(KillSrc)); in expandPostRAPseudo()
913 .addReg(Src, getKillRegState(KillSrc)) in expandPostRAPseudo()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreRegisterInfo.cpp77 .addReg(Reg, getKillRegState(MI.getOperand(0).isKill())) in InsertFPImmInst()
113 .addReg(Reg, getKillRegState(MI.getOperand(0).isKill())) in InsertFPConstInst()
147 .addReg(Reg, getKillRegState(MI.getOperand(0).isKill())) in InsertSPImmInst()
190 .addReg(Reg, getKillRegState(MI.getOperand(0).isKill())) in InsertSPConstInst()
H A DXCoreInstrInfo.cpp340 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
352 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
375 .addReg(SrcReg, getKillRegState(isKill)) in storeRegToStackSlot()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430InstrInfo.cpp54 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO); in storeRegToStackSlot()
58 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO); in storeRegToStackSlot()
103 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.cpp725 .addReg(VReg1, getKillRegState(true)) in generateLoadForNewConst()
927 .addReg(RegX, getKillRegState(KillX)) in reassociateFMA()
932 .addReg(RegY, getKillRegState(KillY)) in reassociateFMA()
944 .addReg(NewVRB, getKillRegState(true)) in reassociateFMA()
968 .addReg(RegX, getKillRegState(KillX)) in reassociateFMA()
1713 getKillRegState(KillSrc); in copyPhysReg()
1730 getKillRegState(KillSrc); in copyPhysReg()
1746 getKillRegState(KillSrc); in copyPhysReg()
1753 getKillRegState(KillSrc); in copyPhysReg()
1758 getKillRegState(KillSrc); in copyPhysReg()
[all …]
H A DPPCFrameLowering.cpp811 .addReg(TempReg, getKillRegState(true)) in emitPrologue()
845 .addReg(ScratchReg, getKillRegState(!HasROPProtect)) in emitPrologue()
863 .addReg(ScratchReg, getKillRegState(true)) in emitPrologue()
873 .addReg(TempReg, getKillRegState(true)) in emitPrologue()
978 .addReg(TOCReg, getKillRegState(true)) in emitPrologue()
1785 .addReg(TempReg, getKillRegState(i == e-1)); in emitEpilogue()
1861 .addReg(TempReg, getKillRegState(i == e-1)); in emitEpilogue()
2441 getKillRegState(true)), in spillCalleeSavedRegisters()
2457 .addReg(VSRContainingGPRs[Dst].first, getKillRegState(true)) in spillCalleeSavedRegisters()
2513 .addReg(MoveReg, getKillRegState(!CR4Spilled))); in restoreCRs()
[all …]
H A DPPCRegisterInfo.cpp667 .addReg(NegSizeReg, getKillRegState(KillNegSizeReg)); in lowerDynamicAlloc()
675 .addReg(NegSizeReg, getKillRegState(KillNegSizeReg)); in lowerDynamicAlloc()
755 .addReg(UnalNegSizeReg, getKillRegState(KillNegSizeReg)) in prepareDynamicAlloca()
772 .addReg(UnalNegSizeReg, getKillRegState(KillNegSizeReg)) in prepareDynamicAlloca()
872 .addReg(SrcReg, getKillRegState(MI.getOperand(0).isKill())); in lowerCRSpilling()
1032 RegState::Implicit | getKillRegState(MI.getOperand(0).isKill())); in lowerCRBitSpilling()
1165 .addReg(Reg, getKillRegState(IsKilled)), in lowerACCSpilling()
1168 .addReg(Reg + 1, getKillRegState(IsKilled)), in lowerACCSpilling()
1228 .addReg(Reg, getKillRegState(IsKilled)), in lowerQuadwordSpilling()
1231 .addReg(Reg + 1, getKillRegState(IsKilled)), in lowerQuadwordSpilling()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVRegisterInfo.cpp234 .addReg(FrameReg, getKillRegState(FrameRegIsKill)) in eliminateFrameIndex()
249 .addReg(FrameReg, getKillRegState(FrameRegIsKill)) in eliminateFrameIndex()
256 .addReg(FrameReg, getKillRegState(FrameRegIsKill)) in eliminateFrameIndex()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64AdvSIMDScalarPass.cpp278 .addReg(Src, getKillRegState(IsKill)); in insertCopy()
363 .addReg(Src0, getKillRegState(KillSrc0), SubReg0) in transformInstruction()
364 .addReg(Src1, getKillRegState(KillSrc1), SubReg1); in transformInstruction()
H A DAArch64InstrInfo.cpp3349 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
3359 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
3397 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
3408 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
3492 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
3496 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
3588 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
3594 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
3601 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
3607 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
[all …]
H A DAArch64ExpandPseudoInsts.cpp220 .addReg(Dest.getReg(), getKillRegState(Dest.isDead())) in expandCMP_SWAP()
237 .addReg(StatusReg, getKillRegState(StatusDead)) in expandCMP_SWAP()
326 .addReg(DestLo.getReg(), getKillRegState(DestLo.isDead())) in expandCMP_SWAP_128()
334 .addReg(DestHi.getReg(), getKillRegState(DestHi.isDead())) in expandCMP_SWAP_128()
342 .addUse(StatusReg, getKillRegState(StatusDead)) in expandCMP_SWAP_128()
355 .addReg(StatusReg, getKillRegState(StatusDead)) in expandCMP_SWAP_128()
369 .addReg(StatusReg, getKillRegState(StatusDead)) in expandCMP_SWAP_128()
704 .addReg(MI.getOperand(1).getReg(), getKillRegState(Kill)) in expandSVESpillFill()
H A DAArch64SIMDInstrOpt.cpp434 unsigned Src0IsKill = getKillRegState(MI.getOperand(1).isKill()); in optimizeVectElement()
436 unsigned Src1IsKill = getKillRegState(MI.getOperand(2).isKill()); in optimizeVectElement()
442 unsigned Src2IsKill = getKillRegState(MI.getOperand(3).isKill()); in optimizeVectElement()
642 StRegKill[i] = getKillRegState(DefiningMI->getOperand(2*i+1).isKill()); in processSeqRegInst()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEInstrInfo.cpp112 .addReg(SrcReg, RegState::Implicit | getKillRegState(KillSrc)); in copyPhysReg()
133 .addReg(SrcReg, getKillRegState(KillSrc)).addImm(1 << 4) in copyPhysReg()
139 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
180 MIB.addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
314 BuildMI(MBB, I, DL, get(Opc)).addReg(SrcReg, getKillRegState(isKill)) in storeRegToStack()
753 LoInst.addReg(SrcLo.getReg(), getKillRegState(SrcLo.isKill())); in expandPseudoMTLoHi()
754 HiInst.addReg(SrcHi.getReg(), getKillRegState(SrcHi.isKill())); in expandPseudoMTLoHi()
764 unsigned KillSrc = getKillRegState(Src.isKill()); in expandCvtFPInt()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kInstrBuilder.h51 return MIB.addImm(Offset).addReg(Reg, getKillRegState(IsKill)); in addRegIndirectWithDisp()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonNewValueJump.cpp694 .addReg(cmpReg1, getKillRegState(MO1IsKill)) in runOnMachineFunction()
695 .addReg(cmpOp2, getKillRegState(MO2IsKill)) in runOnMachineFunction()
700 .addReg(cmpReg1, getKillRegState(MO1IsKill)) in runOnMachineFunction()

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