Lines Matching refs:getKillRegState
3253 AddSubReg(MIB, SrcReg, Indices[SubReg], getKillRegState(KillSrc), TRI); in copyPhysRegTuple()
3277 AddSubReg(MIB, SrcReg, Indices[SubReg], getKillRegState(KillSrc), TRI); in copyGPRRegTuple()
3306 .addReg(SrcReg, RegState::Implicit | getKillRegState(KillSrc)); in copyPhysReg()
3309 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
3331 .addReg(SrcReg, RegState::Implicit | getKillRegState(KillSrc)); in copyPhysReg()
3336 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
3349 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
3359 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
3397 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
3408 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
3492 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
3496 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
3517 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
3520 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
3534 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
3537 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
3551 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
3558 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
3572 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
3579 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
3588 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
3594 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
3601 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
3607 .addReg(SrcReg, getKillRegState(KillSrc)); in copyPhysReg()
3615 .addReg(SrcReg, getKillRegState(KillSrc)) in copyPhysReg()
3624 .addReg(AArch64::NZCV, RegState::Implicit | getKillRegState(KillSrc)); in copyPhysReg()
3652 .addReg(SrcReg0, getKillRegState(IsKill), SubIdx0) in storeRegPairToStackSlot()
3653 .addReg(SrcReg1, getKillRegState(IsKill), SubIdx1) in storeRegPairToStackSlot()
3780 .addReg(SrcReg, getKillRegState(isKill)) in storeRegToStackSlot()
5104 .addReg(SrcReg0, getKillRegState(Src0IsKill)) in genFusedMultiply()
5105 .addReg(SrcReg1, getKillRegState(Src1IsKill)) in genFusedMultiply()
5106 .addReg(SrcReg2, getKillRegState(Src2IsKill)); in genFusedMultiply()
5109 .addReg(SrcReg2, getKillRegState(Src2IsKill)) in genFusedMultiply()
5110 .addReg(SrcReg0, getKillRegState(Src0IsKill)) in genFusedMultiply()
5111 .addReg(SrcReg1, getKillRegState(Src1IsKill)) in genFusedMultiply()
5115 .addReg(SrcReg2, getKillRegState(Src2IsKill)) in genFusedMultiply()
5116 .addReg(SrcReg0, getKillRegState(Src0IsKill)) in genFusedMultiply()
5117 .addReg(SrcReg1, getKillRegState(Src1IsKill)); in genFusedMultiply()
5243 .addReg(SrcReg0, getKillRegState(Src0IsKill)) in genMaddR()
5244 .addReg(SrcReg1, getKillRegState(Src1IsKill)) in genMaddR()