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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonExpandCondsets.cpp184 return Reg == RR.Reg && Sub == RR.Sub; in operator ==()
188 return Reg < RR.Reg || (Reg == RR.Reg && Sub < RR.Sub); in operator <()
192 unsigned Sub; member
262 switch (Sub) { in INITIALIZE_PASS_DEPENDENCY()
291 return Sub != 0 ? TRI->getSubRegIndexLaneMask(Sub) in getLaneMask()
594 MCRegister PhysS = (RS.Sub == 0) ? PhysR : TRI->getSubReg(PhysR, RS.Sub); in getCondTfrOpcode()
779 if (RR.Sub == RD.Sub) in getReachingDefForPred()
781 if (RR.Sub == 0 || RD.Sub == 0) in getReachingDefForPred()
926 Op.setSubReg(RN.Sub); in renameInRange()
1013 RR.Sub = 0; in predicate()
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H A DHexagonBitSimplify.cpp410 if (RR.Sub == 0) { in getSubregMask()
422 if (RR.Sub == Hexagon::isub_hi || RR.Sub == Hexagon::vsub_hi) in getSubregMask()
902 if (RR.Sub == 0) in getFinalVRegClass()
1569 Out.Sub = 0; in findMatch()
1720 Changed = HBS::replaceSubWithSub(RD.Reg, Sub, RS.Reg, RS.Sub, MRI); in propagateRegCopy()
1852 unsigned Sub = 0; in matchHalf() local
1875 RH.Sub = Sub; in matchHalf()
1879 RH.Sub = 0; in matchHalf()
1904 if (H1.Reg != L1.Reg || H1.Sub != L1.Sub || H1.Low || !L1.Low) in matchPackhl()
1906 if (H2.Reg != L2.Reg || H2.Sub != L2.Sub || H2.Low || !L2.Low) in matchPackhl()
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H A DBitTracker.cpp344 (RR.Sub == 0) ? RR.Reg.asMCReg() : TRI.getSubReg(RR.Reg, RR.Sub); in getRegBitWidth()
366 if (!RR.Sub) in getCell()
368 BitMask M = mask(RR.Reg, RR.Sub); in getCell()
382 assert(RR.Sub == 0 && "Unexpected sub-register in definition"); in putCell()
726 assert(RD.Sub == 0); in evaluate()
746 assert(RD.Sub == 0); in evaluate()
828 dbgs() << " input reg: " << printReg(RU.Reg, &ME.TRI, RU.Sub) in visitPHI()
858 dbgs() << " input reg: " << printReg(RU.Reg, &ME.TRI, RU.Sub) in visitNonBranch()
876 assert(RD.Sub == 0 && "Unexpected sub-register in definition"); in visitNonBranch()
1003 BitMask OM = ME.mask(OldRR.Reg, OldRR.Sub); in subst()
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H A DHexagonBlockRanges.h37 unsigned Sub; member
40 return Reg < R.Reg || (Reg == R.Reg && Sub < R.Sub);
/freebsd-13.1/contrib/llvm-project/llvm/lib/Support/
H A DCommandLine.cpp194 if (SC == Sub) in addLiteralOption()
250 if (SC == Sub) in addOption()
252 addOption(O, Sub); in addOption()
277 SubCommand &Sub = *SC; in removeOption() local
282 Sub.OptionsMap.erase(I); in removeOption()
294 for (auto *Opt = Sub.SinkOpts.begin(); Opt != Sub.SinkOpts.end(); ++Opt) { in removeOption()
296 Sub.SinkOpts.erase(Opt); in removeOption()
319 return (!Sub.OptionsMap.empty() || !Sub.PositionalOpts.empty() || in hasOptions()
334 SubCommand &Sub = *SC; in updateArgStr() local
541 if (I == Sub.OptionsMap.end()) in LookupOption()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/MC/MCDisassembler/
H A DMCExternalSymbolizer.cpp100 const MCExpr *Sub = nullptr; in tryAddingSymbolicOperand() local
105 Sub = MCSymbolRefExpr::create(Sym, Ctx); in tryAddingSymbolicOperand()
107 Sub = MCConstantExpr::create((int)SymbolicOp.SubtractSymbol.Value, Ctx); in tryAddingSymbolicOperand()
116 if (Sub) { in tryAddingSymbolicOperand()
119 LHS = MCBinaryExpr::createSub(Add, Sub, Ctx); in tryAddingSymbolicOperand()
121 LHS = MCUnaryExpr::createMinus(Sub, Ctx); in tryAddingSymbolicOperand()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/Disassembler/
H A DAArch64ExternalSymbolizer.cpp182 const MCExpr *Sub = nullptr; in tryAddingSymbolicOperand() local
187 Sub = MCSymbolRefExpr::create(Sym, Ctx); in tryAddingSymbolicOperand()
189 Sub = MCConstantExpr::create(SymbolicOp.SubtractSymbol.Value, Ctx); in tryAddingSymbolicOperand()
198 if (Sub) { in tryAddingSymbolicOperand()
201 LHS = MCBinaryExpr::createSub(Add, Sub, Ctx); in tryAddingSymbolicOperand()
203 LHS = MCUnaryExpr::createMinus(Sub, Ctx); in tryAddingSymbolicOperand()
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/
H A DCalcSpillWeights.cpp49 unsigned Sub, HSub; in copyHint() local
52 Sub = MI->getOperand(0).getSubReg(); in copyHint()
56 Sub = MI->getOperand(1).getSubReg(); in copyHint()
65 return Sub == HSub ? HReg : Register(); in copyHint()
73 if (Sub) in copyHint()
74 return TRI.getMatchingSuperReg(CopiedPReg, Sub, rc); in copyHint()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DDivRemPairs.cpp316 Instruction *Sub = BinaryOperator::CreateSub(X, Mul); in optimizeDivRem() local
351 Sub->insertAfter(Mul); in optimizeDivRem()
366 Sub->setOperand(0, FrX); in optimizeDivRem()
378 Sub->setName(RemInst->getName() + ".decomposed"); in optimizeDivRem()
381 RemInst = Sub; in optimizeDivRem()
383 OrigRemInst->replaceAllUsesWith(Sub); in optimizeDivRem()
H A DReassociate.cpp1021 if (match(Sub, m_Neg(m_Value())) || match(Sub, m_FNeg(m_Value()))) in ShouldBreakUpSubtract()
1030 Value *V0 = Sub->getOperand(0); in ShouldBreakUpSubtract()
1034 Value *V1 = Sub->getOperand(1); in ShouldBreakUpSubtract()
1038 Value *VB = Sub->user_back(); in ShouldBreakUpSubtract()
1039 if (Sub->hasOneUse() && in ShouldBreakUpSubtract()
1056 Value *NegVal = NegateValue(Sub->getOperand(1), Sub, ToRedo); in BreakUpSubtract()
1057 BinaryOperator *New = CreateAdd(Sub->getOperand(0), NegVal, "", Sub, Sub); in BreakUpSubtract()
1058 Sub->setOperand(0, Constant::getNullValue(Sub->getType())); // Drop use of op. in BreakUpSubtract()
1059 Sub->setOperand(1, Constant::getNullValue(Sub->getType())); // Drop use of op. in BreakUpSubtract()
1060 New->takeName(Sub); in BreakUpSubtract()
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/freebsd-13.1/sys/contrib/device-tree/Bindings/sound/
H A Dsamsung,midas-audio.yaml45 on the board: HP, SPK, Main Mic, Sub Mic, Headset Mic.
51 description: Supply for the micbias on the Sub microphone
97 "IN1RP", "Sub Mic",
98 "IN1LP", "Sub Mic";
H A Domap-abe-twl6040.txt28 * Sub Handset Mic
85 "SUBMIC", "Sub Handset Mic",
86 "Sub Handset Mic", "Main Mic Bias",
H A Domap-twl4030.txt25 * Sub Mic
53 * Mic Bias 2 /* Used for Sub Mic or Digimic1 */
/freebsd-13.1/sys/contrib/device-tree/Bindings/phy/
H A Dbrcm-sata-phy.txt20 Sub-nodes:
23 Sub-nodes required properties:
27 Sub-nodes optional properties:
H A Dberlin-sata-phy.txt14 Sub-nodes:
17 Sub-nodes required properties:
H A Dphy-cadence-sierra.txt28 Sub-nodes:
33 Sub-node required properties:
41 Sub-node optional properties:
H A Drockchip-usb-phy.txt15 Sub-nodes:
18 Sub-nodes
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86PartialReduction.cpp191 auto *Sub = dyn_cast<BinaryOperator>(LHS); in trySADReplacement() local
192 if (!Sub || Sub->getOpcode() != Instruction::Sub) in trySADReplacement()
207 Value *Op0 = getZeroExtendedVal(Sub->getOperand(0)); in trySADReplacement()
208 Value *Op1 = getZeroExtendedVal(Sub->getOperand(1)); in trySADReplacement()
H A DX86WinAllocaExpander.cpp44 enum Lowering { TouchAndSub, Sub, Probe }; enumerator
105 return Sub; in getLowering()
163 case Sub: in computeLowerings()
230 case Sub: in lower()
/freebsd-13.1/sys/contrib/device-tree/Bindings/net/
H A Dmarvell-pxa168.txt18 Sub-nodes:
21 Sub-nodes required properties:
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUAtomicOptimizer.cpp126 case AtomicRMWInst::Sub: in visitAtomicRMWInst()
179 Op = AtomicRMWInst::Sub; in visitIntrinsicInst()
258 case AtomicRMWInst::Sub: in buildNonAtomicBinOp()
259 return B.CreateBinOp(Instruction::Sub, LHS, RHS); in buildNonAtomicBinOp()
433 case AtomicRMWInst::Sub: in getIdentityValueForAtomicOp()
533 Op == AtomicRMWInst::Sub ? AtomicRMWInst::Add : Op; in optimizeAtomic()
561 case AtomicRMWInst::Sub: { in optimizeAtomic()
664 case AtomicRMWInst::Sub: in optimizeAtomic()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiInstrInfo.cpp303 MachineInstr *Sub = nullptr; in optimizeCompareInstr() local
331 Sub = &*I; in optimizeCompareInstr()
341 if (!MI && !Sub) in optimizeCompareInstr()
346 MI = Sub; in optimizeCompareInstr()
374 if (Sub) { in optimizeCompareInstr()
382 if (SrcReg2 != 0 && Sub->getOperand(1).getReg() == SrcReg2 && in optimizeCompareInstr()
383 Sub->getOperand(2).getReg() == SrcReg) { in optimizeCompareInstr()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVELFStreamer.cpp238 unsigned Add, Sub; in emitValueImpl() local
239 std::tie(Add, Sub) = getRelocPairForSize(Size); in emitValueImpl()
244 DF->getContents().size(), B, static_cast<MCFixupKind>(Sub), Loc)); in emitValueImpl()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Analysis/
H A DTypeBasedAliasAnalysis.cpp764 SmallVector<Metadata *, 3> Sub; in shiftTBAAStruct() local
781 Sub.push_back(ConstantAsMetadata::get( in shiftTBAAStruct()
783 Sub.push_back(ConstantAsMetadata::get( in shiftTBAAStruct()
785 Sub.push_back(MD->getOperand(i + 2)); in shiftTBAAStruct()
787 return MDNode::get(MD->getContext(), Sub); in shiftTBAAStruct()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Transforms/Instrumentation/
H A DControlHeightReduction.cpp259 assert(Sub && "null Sub"); in split()
486 for (CHRScope *Sub : Subs) { in print()
487 OS << *Sub << ", "; in print()
1032 for (CHRScope *Sub : Subscopes) { in findScopes()
1035 Result->addSub(Sub); in findScopes()
1038 Scopes.push_back(Sub); in findScopes()
1130 for (CHRScope *Sub : Scope->Subs) in getSelectsInScope()
1131 getSelectsInScope(Sub, Output); in getSelectsInScope()
1252 for (CHRScope *Sub : Split->Subs) { in splitScope()
1329 for (CHRScope *Sub : Scope->Subs) { in classifyBiasedScopes()
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