Searched refs:SrcReg0 (Results 1 – 3 of 3) sorted by relevance
433 Register SrcReg0 = MI.getOperand(1).getReg(); in optimizeVectElement() local454 .addReg(SrcReg0, Src0IsKill) in optimizeVectElement()466 .addReg(SrcReg0, Src0IsKill) in optimizeVectElement()
3643 Register SrcReg0 = SrcReg; in storeRegPairToStackSlot() local3646 SrcReg0 = TRI.getSubReg(SrcReg, SubIdx0); in storeRegPairToStackSlot()3652 .addReg(SrcReg0, getKillRegState(IsKill), SubIdx0) in storeRegPairToStackSlot()5076 Register SrcReg0 = MUL->getOperand(1).getReg(); in genFusedMultiply() local5094 if (Register::isVirtualRegister(SrcReg0)) in genFusedMultiply()5095 MRI.constrainRegClass(SrcReg0, RC); in genFusedMultiply()5104 .addReg(SrcReg0, getKillRegState(Src0IsKill)) in genFusedMultiply()5227 Register SrcReg0 = MUL->getOperand(1).getReg(); in genMaddR() local5234 if (Register::isVirtualRegister(SrcReg0)) in genMaddR()5235 MRI.constrainRegClass(SrcReg0, RC); in genMaddR()[all …]
1317 Register SrcReg0 = I.getOperand(1).getReg(); in selectMergeValues() local1320 const LLT SrcTy = MRI.getType(SrcReg0); in selectMergeValues()