Searched refs:SparseBitVector (Results 1 – 17 of 17) sorted by relevance
255 class SparseBitVector {445 SparseBitVector(const SparseBitVector &RHS) in SparseBitVector() function447 SparseBitVector(SparseBitVector &&RHS) in SparseBitVector() function456 SparseBitVector& operator=(const SparseBitVector& RHS) {464 SparseBitVector &operator=(SparseBitVector &&RHS) {694 SparseBitVector RHS2Copy(RHS2); in intersectWithComplement()848 inline SparseBitVector<ElementSize>851 SparseBitVector<ElementSize> Result(LHS);857 inline SparseBitVector<ElementSize>866 inline SparseBitVector<ElementSize>[all …]
25 SparseBitVector<> &V) { in readSparseBitVector()47 SparseBitVector<> &Vec) { in writeSparseBitVector()
84 SparseBitVector<> AliveBlocks;123 SparseBitVector<> PHIJoins;303 std::vector<SparseBitVector<>> &LiveInSets);
33 template <unsigned Element> class SparseBitVector; variable35 using LiveVirtRegBitSet = SparseBitVector<128>;
833 std::vector<SparseBitVector<>> *LiveInSets = nullptr);
31 Error readSparseBitVector(BinaryStreamReader &Stream, SparseBitVector<> &V);32 Error writeSparseBitVector(BinaryStreamWriter &Writer, SparseBitVector<> &Vec);270 mutable SparseBitVector<> Present;271 mutable SparseBitVector<> Deleted;
100 std::vector<SparseBitVector<>> *LiveInSets);159 std::vector<SparseBitVector<>> LiveInSets; in runOnMachineFunction()170 SparseBitVector<>::iterator AliveBlockItr = VI.AliveBlocks.begin(); in runOnMachineFunction()171 SparseBitVector<>::iterator EndItr = VI.AliveBlocks.end(); in runOnMachineFunction()639 std::vector<SparseBitVector<>> *LiveInSets) { in SplitPHIEdges()
810 std::vector<SparseBitVector<>> &LiveInSets) { in addNewBlock()813 SparseBitVector<> &BV = LiveInSets[SuccBB->getNumber()]; in addNewBlock()
134 SparseBitVector<> RegsToClearKillFlags;
1008 std::vector<SparseBitVector<>> *LiveInSets) { in SplitCriticalEdge()
193 static void locateCStrings(SparseBitVector<8> &BV, Value *Fmt) { in locateCStrings()227 SparseBitVector<8> SpecIsCString; in emitAMDGPUPrintfCall()
226 typedef SparseBitVector<> RegUnitList;
642 DiffVec &diffEncode(DiffVec &V, unsigned InitVal, SparseBitVector<> List) { in diffEncode()936 SparseBitVector<> RUs = Reg.getNativeRegUnits(); in runMCDesc()
306 SparseBitVector<> SavedIsIrrLoopHeader(std::move(BFI.IsIrrLoopHeader)); in cleanup()
425 SparseBitVector<> IsIrrLoopHeader;
1276 SparseBitVector<> LoadDepRegs; in tracePredStateThroughBlocksAndHarden()
573 DenseMap<BasicBlock *, SparseBitVector<>> RevisitOnReachabilityChange;