Home
last modified time | relevance | path

Searched refs:STM (Results 1 – 25 of 31) sorted by relevance

12

/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUAsmPrinter.cpp217 if (STM.isAmdHsaOS()) in emitFunctionBodyStart()
430 if (STM.hasGFX90AInsts()) in getAmdhsaKernelDescriptor()
452 if (!STM.isAmdHsaOS() && !STM.isAmdPalOS()) { in runOnMachineFunction()
462 if (STM.isAmdPalOS()) { in runOnMachineFunction()
472 if (STM.dumpCode()) { in runOnMachineFunction()
538 if (STM.hasGFX90AInsts()) in runOnMachineFunction()
742 STM.hasSGPRInitBug()) { in getSIProgramInfo()
759 if (STM.hasSGPRInitBug()) { in getSIProgramInfo()
838 S_00B84C_TRAP_HANDLER(STM.isAmdHsaOS() ? 0 : STM.isTrapHandlerEnabled()) | in getSIProgramInfo()
949 if (STM.isWave32()) in EmitPALMetadata()
[all …]
H A DR600AsmPrinter.cpp47 const R600Subtarget &STM = MF.getSubtarget<R600Subtarget>(); in EmitProgramInfoR600() local
48 const R600RegisterInfo *RI = STM.getRegisterInfo(); in EmitProgramInfoR600()
71 if (STM.getGeneration() >= AMDGPUSubtarget::EVERGREEN) { in EmitProgramInfoR600()
H A DSILoadStoreOptimizer.cpp181 const GCNSubtarget *STM = nullptr; member in __anon8de982330111::SILoadStoreOptimizer
902 (!widthsFit(*STM, CI, Paired) || !offsetsCanBeCombined(CI, *STM, Paired))) in checkAndPrepareMerge()
1034 if (STM->ldsRequiresM0Init()) in read2Opcode()
1040 if (STM->ldsRequiresM0Init()) in read2ST64Opcode()
1131 if (STM->ldsRequiresM0Init()) in write2Opcode()
1138 if (STM->ldsRequiresM0Init()) in write2ST64Opcode()
2017 CI.setMI(MI, *TII, *STM); in collectMergeableInsts()
2130 CI.setMI(NewMI, *TII, *STM); in optimizeInstsWithSameBaseAddr()
2136 CI.setMI(NewMI, *TII, *STM); in optimizeInstsWithSameBaseAddr()
2142 CI.setMI(NewMI, *TII, *STM); in optimizeInstsWithSameBaseAddr()
[all …]
H A DAMDGPUHSAMetadataStreamer.cpp193 const GCNSubtarget &STM = MF.getSubtarget<GCNSubtarget>(); in getHSACodeProps() local
202 HSACodeProps.mKernargSegmentSize = STM.getKernArgSegmentSize(F, in getHSACodeProps()
208 HSACodeProps.mWavefrontSize = STM.getWavefrontSize(); in getHSACodeProps()
213 HSACodeProps.mIsXNACKEnabled = STM.isXNACKEnabled(); in getHSACodeProps()
852 const GCNSubtarget &STM = MF.getSubtarget<GCNSubtarget>(); in getHSAKernelProps() local
860 STM.getKernArgSegmentSize(F, MaxKernArgAlign)); in getHSAKernelProps()
868 Kern.getDocument()->getNode(STM.getWavefrontSize()); in getHSAKernelProps()
H A DSIMemoryLegalizer.cpp1054 const GCNSubtarget &STM = MBB.getParent()->getSubtarget<GCNSubtarget>(); in insertAcquire() local
1056 const unsigned InvalidateL1 = STM.isAmdPalOS() || STM.isMesa3DOS() in insertAcquire()
/freebsd-13.1/sys/contrib/device-tree/Bindings/iio/humidity/
H A Dhts221.txt1 * HTS221 STM humidity + temperature sensor
/freebsd-13.1/contrib/file/magic/Magdir/
H A Dvaried.out43 # Generated by the "examples" in STM's ST40 devkit, and derived code.
/freebsd-13.1/sys/contrib/device-tree/Bindings/iio/imu/
H A Dst_lsm6dsx.txt1 * ST_LSM6DSx driver for STM 6-axis (acc + gyro) imu Mems sensors
/freebsd-13.1/sys/contrib/device-tree/Bindings/arm/
H A Dcoresight.txt71 * Additional required properties for System Trace Macrocells (STM):
356 4. STM
393 [1]. There is currently two version of STM: STM32 and STM500. Both
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMScheduleM7.td240 // time for STM cannot be overridden because it is a variadic source operand.
245 (instregex "(t|t2)STM(DB|IA)$")>;
249 (instregex "(t|t2)STM(DB|IA)_UPD$", "tPUSH")>;
H A DARMScheduleM4.td62 def : M4UnitL1I<(instregex "(t|t2)STM")>;
H A DARMScheduleSwift.td535 (instregex "STM(IB|IA|DB|DA)$", "(t2|sys|t)STM(IB|IA|DB|DA)$")>;
537 (instregex "STM(IB|IA|DB|DA)_UPD", "(t2|sys|t)STM(IB|IA|DB|DA)_UPD",
H A DARMScheduleR52.td506 (instregex "STM(IB|IA|DB|DA)$", "(t2|sys|t)STM(IB|IA|DB|DA)$")>;
508 (instregex "STM(IB|IA|DB|DA)_UPD", "(t2|sys|t)STM(IB|IA|DB|DA)_UPD",
H A DARMBaseInstrInfo.cpp1597 MachineInstrBuilder LDM, STM; in expandMEMCPY() local
1610 STM = BuildMI(*BB, MI, dl, TII->get(isThumb2 ? ARM::t2STMIA_UPD in expandMEMCPY()
1615 STM = BuildMI(*BB, MI, dl, TII->get(isThumb2 ? ARM::t2STMIA : ARM::STMIA)); in expandMEMCPY()
1622 STM.add(STBase).add(predOps(ARMCC::AL)); in expandMEMCPY()
1637 STM.addReg(Reg, RegState::Kill); in expandMEMCPY()
H A DARMScheduleA57.td712 def : InstRW<[A57WriteSTM], (instregex "(t2|sys|t)?STM(IA|DA|DB|IB)$")>;
714 (instregex "(t2|sys|t)?STM(IA_UPD|DA_UPD|DB_UPD|IB_UPD)", "tPUSH")>;
H A DARMInstrThumb.td851 // There is no non-writeback version of STM for Thumb.
1655 // post-inc STR -> STM r0!, {r1}. The layout of this (because it doesn't def
/freebsd-13.1/contrib/llvm-project/llvm/lib/IR/
H A DDataLayout.cpp675 StructLayoutMap *STM = static_cast<StructLayoutMap*>(LayoutMap); in getStructLayout() local
676 StructLayout *&SL = (*STM)[Ty]; in getStructLayout()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYInstrInfo.td249 // TODO: LDM and STM.
/freebsd-13.1/contrib/llvm-project/libunwind/src/
H A DUnwindRegistersSave.S799 @ . the pc (r15) cannot be in the list in an STM instruction
/freebsd-13.1/sys/contrib/device-tree/src/arm/
H A Duniphier-pxs2.dtsi382 /* chip-internal connection for STM */
H A Dqcom-msm8974.dtsi1192 * 7 - connected to STM
H A Dqcom-apq8064.dtsi1652 * 2 - connected to STM component
/freebsd-13.1/sys/contrib/device-tree/src/arm64/qcom/
H A Dmsm8916.dtsi1324 * 7 - connected to STM component
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZScheduleZ196.td256 def : InstRW<[WLat1, LSU2, FXU5, GroupAlone], (instregex "STM(H|Y|G)?$")>;
H A DSystemZScheduleZEC12.td267 def : InstRW<[WLat1, LSU2, FXU5, GroupAlone], (instregex "STM(H|Y|G)?$")>;

12