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Searched refs:RegisterClassInfo (Results 1 – 25 of 31) sorted by relevance

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/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/
H A DRegisterClassInfo.cpp41 RegisterClassInfo::RegisterClassInfo() = default;
43 void RegisterClassInfo::runOnMachineFunction(const MachineFunction &mf) { in runOnMachineFunction()
92 void RegisterClassInfo::compute(const TargetRegisterClass *RC) const { in compute()
171 unsigned RegisterClassInfo::computePSetLimit(unsigned Idx) const { in computePSetLimit()
H A DCriticalAntiDepBreaker.h31 class RegisterClassInfo; variable
41 const RegisterClassInfo &RegClassInfo;
74 CriticalAntiDepBreaker(MachineFunction& MFi, const RegisterClassInfo &RCI);
H A DAggressiveAntiDepBreaker.h34 class RegisterClassInfo; variable
122 const RegisterClassInfo &RegClassInfo;
133 const RegisterClassInfo &RCI,
H A DAllocationOrder.h26 class RegisterClassInfo; variable
85 const RegisterClassInfo &RegClassInfo,
H A DAllocationOrder.cpp30 const RegisterClassInfo &RegClassInfo, in create()
H A DRegAllocBase.h70 RegisterClassInfo RegClassInfo;
H A DPostRASchedulerList.cpp80 RegisterClassInfo RegClassInfo;
147 const RegisterClassInfo &,
206 const RegisterClassInfo &RCI, in SchedulePostRATDList()
H A DCriticalAntiDepBreaker.cpp42 const RegisterClassInfo &RCI) in CriticalAntiDepBreaker()
702 const RegisterClassInfo &RCI) { in createCriticalAntiDepBreaker()
H A DBreakFalseDeps.cpp38 RegisterClassInfo RegClassInfo;
H A DShrinkWrap.cpp112 RegisterClassInfo RCI;
H A DAggressiveAntiDepBreaker.cpp121 MachineFunction &MFi, const RegisterClassInfo &RCI, in AggressiveAntiDepBreaker()
1006 MachineFunction &MFi, const RegisterClassInfo &RCI, in createAggressiveAntiDepBreaker()
H A DMachineCombiner.cpp76 RegisterClassInfo RegClassInfo;
H A DRegisterPressure.cpp264 const RegisterClassInfo *rci, in init()
963 const RegisterClassInfo *RCI, in computeExcessPressureDelta()
H A DRegAllocGreedy.cpp159 RegisterClassInfo RCI;
2093 const RegisterClassInfo &RCI) { in getNumAllocatableRegsForConstraints()
H A DMachineSink.cpp124 RegisterClassInfo RegClassInfo;
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DAntiDepBreaker.h28 class RegisterClassInfo; variable
95 MachineFunction &MFi, const RegisterClassInfo &RCI,
99 const RegisterClassInfo &RCI);
H A DRegisterClassInfo.h30 class RegisterClassInfo {
84 RegisterClassInfo();
H A DRegisterPressure.h37 class RegisterClassInfo; variable
361 const RegisterClassInfo *RCI = nullptr;
403 void init(const MachineFunction *mf, const RegisterClassInfo *rci,
H A DMachinePipeliner.h68 RegisterClassInfo RegClassInfo;
116 const RegisterClassInfo &RegClassInfo;
195 const RegisterClassInfo &rci, unsigned II) in SwingSchedulerDAG()
H A DMachineScheduler.h111 class RegisterClassInfo; variable
128 RegisterClassInfo *RegClassInfo;
387 RegisterClassInfo *RegClassInfo;
H A DTargetInstrInfo.h1125 RegisterClassInfo *RegClassInfo) const { in shouldReduceRegisterPressure()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonMachineScheduler.h99 RegisterClassInfo *getRegClassInfo() { return RegClassInfo; } in getRegClassInfo()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIPreAllocateWWMRegs.cpp38 RegisterClassInfo RegClassInfo;
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.h372 RegisterClassInfo *RegClassInfo) const override;
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64A57FPLoadBalancing.cpp112 RegisterClassInfo RCI;

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