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Searched refs:RegB (Results 1 – 6 of 6) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCRegisterInfo.h560 bool isSubRegister(MCRegister RegA, MCRegister RegB) const { in isSubRegister() argument
561 return isSuperRegister(RegB, RegA); in isSubRegister()
565 bool isSuperRegister(MCRegister RegA, MCRegister RegB) const;
568 bool isSubRegisterEq(MCRegister RegA, MCRegister RegB) const { in isSubRegisterEq() argument
569 return isSuperRegisterEq(RegB, RegA); in isSubRegisterEq()
574 bool isSuperRegisterEq(MCRegister RegA, MCRegister RegB) const { in isSuperRegisterEq() argument
575 return RegA == RegB || isSuperRegister(RegA, RegB); in isSuperRegisterEq()
580 bool isSuperOrSubRegisterEq(MCRegister RegA, MCRegister RegB) const { in isSuperOrSubRegisterEq() argument
581 return isSubRegisterEq(RegA, RegB) || isSuperRegister(RegA, RegB); in isSuperOrSubRegisterEq()
656 inline bool MCRegisterInfo::isSuperRegister(MCRegister RegA, MCRegister RegB) const{ in isSuperRegister() argument
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/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/
H A DTwoAddressInstructionPass.cpp418 if (RegA == RegB) in regsAreCompatible()
420 if (!RegA || !RegB) in regsAreCompatible()
422 return TRI->regsOverlap(RegA, RegB); in regsAreCompatible()
506 if (!noUseAfterLastDef(RegB, Dist, LastDefB)) in isProfitableToCommute()
633 DstRegMap.erase(RegB); in convertInstTo3Addr()
1373 Register RegB = 0; in processTiedPairs() local
1384 RegB = MI->getOperand(SrcIdx).getReg(); in processTiedPairs()
1387 if (RegA == RegB) { in processTiedPairs()
1413 MIB.addReg(RegB, 0, SubRegB); in processTiedPairs()
1457 if (RegA.isVirtual() && RegB.isVirtual()) in processTiedPairs()
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H A DImplicitNullChecks.cpp293 Register RegB = MOB.getReg(); in canReorder() local
295 if (TRI->regsOverlap(RegA, RegB) && (MOA.isDef() || MOB.isDef())) in canReorder()
H A DTargetInstrInfo.cpp845 Register RegB = OpB.getReg(); in reassociateOps() local
852 if (Register::isVirtualRegister(RegB)) in reassociateOps()
853 MRI.constrainRegClass(RegB, RC); in reassociateOps()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonInstrInfo.cpp2131 for (auto &RegB : UsesB) { in isDependent() local
2133 if (RegA == RegB) in isDependent()
2138 if (RegB == *SubRegs) in isDependent()
2141 if (Register::isPhysicalRegister(RegB)) in isDependent()
2142 for (MCSubRegIterator SubRegs(RegB, &HRI); SubRegs.isValid(); ++SubRegs) in isDependent()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.cpp517 Register RegB = Root.getOperand(AddOpIdx).getReg(); in getFMAPatterns() local
518 MachineInstr *Prev = MRI->getUniqueVRegDef(RegB); in getFMAPatterns()
865 RegA21, RegB; in reassociateFMA() local
870 GetFMAInstrInfo(Root, RegM31, RegM32, RegB, KillM31, KillM32, KillB); in reassociateFMA()
1020 .addReg(RegB, getKillRegState(RegB)) in reassociateFMA()