Searched refs:RISCVTargetLowering (Results 1 – 8 of 8) sorted by relevance
242 RISCVII::VLMUL LMUL = RISCVTargetLowering::getLMUL(VT); in selectVLSEG()283 RISCVII::VLMUL LMUL = RISCVTargetLowering::getLMUL(VT); in selectVLSEGFF()327 RISCVII::VLMUL LMUL = RISCVTargetLowering::getLMUL(VT); in selectVLXSEG()378 RISCVII::VLMUL LMUL = RISCVTargetLowering::getLMUL(VT); in selectVSSEG()408 RISCVII::VLMUL LMUL = RISCVTargetLowering::getLMUL(VT); in selectVSXSEG()648 switch (RISCVTargetLowering::getLMUL(Src1VT)) { in Select()717 switch (RISCVTargetLowering::getLMUL(Src1VT)) { in Select()764 switch (RISCVTargetLowering::getLMUL(VT)) { in Select()1007 RISCVII::VLMUL LMUL = RISCVTargetLowering::getLMUL(VT); in Select()1043 RISCVII::VLMUL LMUL = RISCVTargetLowering::getLMUL(VT); in Select()[all …]
23 class RISCVTargetLowering; variable28 RISCVCallLowering(const RISCVTargetLowering &TLI);
45 RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM, in RISCVTargetLowering() function in RISCVTargetLowering1093 RISCVII::VLMUL RISCVTargetLowering::getLMUL(MVT VT) { in getLMUL()2089 SDValue RISCVTargetLowering::LowerOperation(SDValue Op, in LowerOperation()4685 SDValue RISCVTargetLowering::lowerMSCATTER(SDValue Op, in lowerMSCATTER()7296 void RISCVTargetLowering::analyzeInputArgs( in analyzeInputArgs()7328 void RISCVTargetLowering::analyzeOutputArgs( in analyzeOutputArgs()7638 SDValue RISCVTargetLowering::LowerFormalArguments( in LowerFormalArguments()8173 bool RISCVTargetLowering::CanLowerReturn( in CanLowerReturn()8295 void RISCVTargetLowering::validateCCReservedRegs( in validateCCReservedRegs()8459 RISCVTargetLowering::ConstraintType[all …]
71 RISCVTargetLowering TLInfo;98 const RISCVTargetLowering *getTargetLowering() const override { in getTargetLowering()
34 const RISCVTargetLowering *TLI;37 const RISCVTargetLowering *getTLI() const { return TLI; } in getTLI()
21 RISCVCallLowering::RISCVCallLowering(const RISCVTargetLowering &TLI) in RISCVCallLowering()
288 class RISCVTargetLowering : public TargetLowering {292 explicit RISCVTargetLowering(const TargetMachine &TM,511 const RISCVTargetLowering &TLI,
135 // RISCVTargetLowering::{emitLeadingFence,emitTrailingFence}.321 // RISCVTargetLowering::{emitLeadingFence,emitTrailingFence}.