Searched refs:RISCVAsmParser (Results 1 – 4 of 4) sorted by relevance
60 class RISCVAsmParser : public MCTargetAsmParser { class380 return RISCVAsmParser::classifySymbolRef(getImm(), VK) && in isBareSymbol()390 return RISCVAsmParser::classifySymbolRef(getImm(), VK) && in isCallSymbol()401 return RISCVAsmParser::classifySymbolRef(getImm(), VK) && in isPseudoJumpSymbol()411 return RISCVAsmParser::classifySymbolRef(getImm(), VK) && in isTPRelAddSymbol()956 bool RISCVAsmParser::generateImmOutOfRangeError( in generateImmOutOfRangeError()1813 bool RISCVAsmParser::classifySymbolRef(const MCExpr *Expr, in classifySymbolRef()1844 bool RISCVAsmParser::parseDirectiveOption() { in parseDirectiveOption()1965 bool RISCVAsmParser::parseDirectiveAttribute() { in parseDirectiveAttribute()2459 bool RISCVAsmParser::checkPseudoAddTPRel(MCInst &Inst, in checkPseudoAddTPRel()[all …]
284 def RISCVAsmParser : AsmParser {295 let AssemblyParsers = [RISCVAsmParser];
34 // 16/32-bit sub-register, RISCVAsmParser will need to coerce a register number
1334 SRCS_MIN+= Target/RISCV/AsmParser/RISCVAsmParser.cpp