60 class RISCVAsmParser : public MCTargetAsmParser {  class
228   RISCVAsmParser(const MCSubtargetInfo &STI, MCAsmParser &Parser,  in RISCVAsmParser()  function in __anonda18b5620111::RISCVAsmParser
366       IsValid = RISCVAsmParser::classifySymbolRef(getImm(), VK);  in isBareSimmNLsb0()
380     return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&  in isBareSymbol()
390     return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&  in isCallSymbol()
401     return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&  in isPseudoJumpSymbol()
411     return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&  in isTPRelAddSymbol()
615       IsValid = RISCVAsmParser::classifySymbolRef(getImm(), VK);  in isSImm12()
646       IsValid = RISCVAsmParser::classifySymbolRef(getImm(), VK);  in isUImm20LUI()
664       IsValid = RISCVAsmParser::classifySymbolRef(getImm(), VK);  in isUImm20AUIPC()
919 unsigned RISCVAsmParser::validateTargetOperandClass(MCParsedAsmOperand &AsmOp,  in validateTargetOperandClass()
956 bool RISCVAsmParser::generateImmOutOfRangeError(  in generateImmOutOfRangeError()
967 bool RISCVAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,  in MatchAndEmitInstruction()
1200 bool RISCVAsmParser::ParseRegister(unsigned &RegNo, SMLoc &StartLoc,  in ParseRegister()
1207 OperandMatchResultTy RISCVAsmParser::tryParseRegister(unsigned &RegNo,  in tryParseRegister()
1223 OperandMatchResultTy RISCVAsmParser::parseRegister(OperandVector &Operands,  in parseRegister()
1273 RISCVAsmParser::parseCSRSystemRegister(OperandVector &Operands) {  in parseCSRSystemRegister()
1347 OperandMatchResultTy RISCVAsmParser::parseImmediate(OperandVector &Operands) {  in parseImmediate()
1376 RISCVAsmParser::parseOperandWithModifier(OperandVector &Operands) {  in parseOperandWithModifier()
1415 OperandMatchResultTy RISCVAsmParser::parseBareSymbol(OperandVector &Operands) {  in parseBareSymbol()
1467 OperandMatchResultTy RISCVAsmParser::parseCallSymbol(OperandVector &Operands) {  in parseCallSymbol()
1495 RISCVAsmParser::parsePseudoJumpSymbol(OperandVector &Operands) {  in parsePseudoJumpSymbol()
1515 OperandMatchResultTy RISCVAsmParser::parseJALOffset(OperandVector &Operands) {  in parseJALOffset()
1532 OperandMatchResultTy RISCVAsmParser::parseVTypeI(OperandVector &Operands) {  in parseVTypeI()
1612 OperandMatchResultTy RISCVAsmParser::parseMaskReg(OperandVector &Operands) {  in parseMaskReg()
1639 RISCVAsmParser::parseMemOpBaseReg(OperandVector &Operands) {  in parseMemOpBaseReg()
1664 OperandMatchResultTy RISCVAsmParser::parseAtomicMemOp(OperandVector &Operands) {  in parseAtomicMemOp()
1734 bool RISCVAsmParser::parseOperand(OperandVector &Operands, StringRef Mnemonic) {  in parseOperand()
1761 bool RISCVAsmParser::ParseInstruction(ParseInstructionInfo &Info,  in ParseInstruction()
1813 bool RISCVAsmParser::classifySymbolRef(const MCExpr *Expr,  in classifySymbolRef()
1829 bool RISCVAsmParser::ParseDirective(AsmToken DirectiveID) {  in ParseDirective()
1844 bool RISCVAsmParser::parseDirectiveOption() {  in parseDirectiveOption()
1965 bool RISCVAsmParser::parseDirectiveAttribute() {  in parseDirectiveAttribute()
2203 void RISCVAsmParser::emitToStreamer(MCStreamer &S, const MCInst &Inst) {  in emitToStreamer()
2211 void RISCVAsmParser::emitLoadImm(MCRegister DestReg, int64_t Value,  in emitLoadImm()
2237 void RISCVAsmParser::emitAuipcInstPair(MCOperand DestReg, MCOperand TmpReg,  in emitAuipcInstPair()
2264 void RISCVAsmParser::emitLoadLocalAddress(MCInst &Inst, SMLoc IDLoc,  in emitLoadLocalAddress()
2278 void RISCVAsmParser::emitLoadAddress(MCInst &Inst, SMLoc IDLoc,  in emitLoadAddress()
2303 void RISCVAsmParser::emitLoadTLSIEAddress(MCInst &Inst, SMLoc IDLoc,  in emitLoadTLSIEAddress()
2318 void RISCVAsmParser::emitLoadTLSGDAddress(MCInst &Inst, SMLoc IDLoc,  in emitLoadTLSGDAddress()
2332 void RISCVAsmParser::emitLoadStoreSymbol(MCInst &Inst, unsigned Opcode,  in emitLoadStoreSymbol()
2351 void RISCVAsmParser::emitPseudoExtend(MCInst &Inst, bool SignExtend,  in emitPseudoExtend()
2380 void RISCVAsmParser::emitVMSGE(MCInst &Inst, unsigned Opcode, SMLoc IDLoc,  in emitVMSGE()
2459 bool RISCVAsmParser::checkPseudoAddTPRel(MCInst &Inst,  in checkPseudoAddTPRel()
2472 std::unique_ptr<RISCVOperand> RISCVAsmParser::defaultMaskRegOp() const {  in defaultMaskRegOp()
2477 bool RISCVAsmParser::validateInstruction(MCInst &Inst,  in validateInstruction()
2537 bool RISCVAsmParser::processInstruction(MCInst &Inst, SMLoc IDLoc,  in processInstruction()
2706   RegisterMCAsmParser<RISCVAsmParser> X(getTheRISCV32Target());  in LLVMInitializeRISCVAsmParser()
2707   RegisterMCAsmParser<RISCVAsmParser> Y(getTheRISCV64Target());  in LLVMInitializeRISCVAsmParser()