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Searched refs:REG (Results 1 – 25 of 39) sorted by relevance

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/freebsd-13.1/sys/contrib/openzfs/module/zfs/
H A Dvdev_raidz_math_powerpc_altivec_common.h65 #define RVR0_(REG, ...) [w##REG] "v" (w##REG) argument
66 #define RVR1_(_1, REG, ...) [w##REG] "v" (w##REG) argument
67 #define RVR2_(_1, _2, REG, ...) [w##REG] "v" (w##REG) argument
68 #define RVR3_(_1, _2, _3, REG, ...) [w##REG] "v" (w##REG) argument
85 #define WVR0_(REG, ...) [w##REG] "=v" (w##REG) argument
86 #define WVR1_(_1, REG, ...) [w##REG] "=v" (w##REG) argument
87 #define WVR2_(_1, _2, REG, ...) [w##REG] "=v" (w##REG) argument
88 #define WVR3_(_1, _2, _3, REG, ...) [w##REG] "=v" (w##REG) argument
105 #define UVR0_(REG, ...) [w##REG] "+&v" (w##REG) argument
106 #define UVR1_(_1, REG, ...) [w##REG] "+&v" (w##REG) argument
[all …]
H A Dvdev_raidz_math_aarch64_neon_common.h64 #define RVR0_(REG, ...) [w##REG] "w" (w##REG) argument
65 #define RVR1_(_1, REG, ...) [w##REG] "w" (w##REG) argument
66 #define RVR2_(_1, _2, REG, ...) [w##REG] "w" (w##REG) argument
67 #define RVR3_(_1, _2, _3, REG, ...) [w##REG] "w" (w##REG) argument
84 #define WVR0_(REG, ...) [w##REG] "=w" (w##REG) argument
85 #define WVR1_(_1, REG, ...) [w##REG] "=w" (w##REG) argument
86 #define WVR2_(_1, _2, REG, ...) [w##REG] "=w" (w##REG) argument
87 #define WVR3_(_1, _2, _3, REG, ...) [w##REG] "=w" (w##REG) argument
104 #define UVR0_(REG, ...) [w##REG] "+&w" (w##REG) argument
105 #define UVR1_(_1, REG, ...) [w##REG] "+&w" (w##REG) argument
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H A Dvdev_raidz_math_avx512f.c41 #define VR0_(REG, ...) "zmm"#REG argument
42 #define VR1_(_1, REG, ...) "zmm"#REG argument
43 #define VR2_(_1, _2, REG, ...) "zmm"#REG argument
44 #define VR3_(_1, _2, _3, REG, ...) "zmm"#REG argument
45 #define VR4_(_1, _2, _3, _4, REG, ...) "zmm"#REG argument
59 #define VRy0_(REG, ...) "ymm"#REG argument
60 #define VRy1_(_1, REG, ...) "ymm"#REG argument
61 #define VRy2_(_1, _2, REG, ...) "ymm"#REG argument
62 #define VRy3_(_1, _2, _3, REG, ...) "ymm"#REG argument
63 #define VRy4_(_1, _2, _3, _4, REG, ...) "ymm"#REG argument
[all …]
H A Dvdev_raidz_math_ssse3.c39 #define VR0_(REG, ...) "xmm"#REG argument
40 #define VR1_(_1, REG, ...) "xmm"#REG argument
41 #define VR2_(_1, _2, REG, ...) "xmm"#REG argument
42 #define VR3_(_1, _2, _3, REG, ...) "xmm"#REG argument
43 #define VR4_(_1, _2, _3, _4, REG, ...) "xmm"#REG argument
44 #define VR5_(_1, _2, _3, _4, _5, REG, ...) "xmm"#REG argument
45 #define VR6_(_1, _2, _3, _4, _5, _6, REG, ...) "xmm"#REG argument
46 #define VR7_(_1, _2, _3, _4, _5, _6, _7, REG, ...) "xmm"#REG argument
59 #define R_23(REG...) _R_23(REG, 1, 2, 3) argument
H A Dvdev_raidz_math_avx2.c38 #define VR0_(REG, ...) "ymm"#REG argument
39 #define VR1_(_1, REG, ...) "ymm"#REG argument
40 #define VR2_(_1, _2, REG, ...) "ymm"#REG argument
41 #define VR3_(_1, _2, _3, REG, ...) "ymm"#REG argument
42 #define VR4_(_1, _2, _3, _4, REG, ...) "ymm"#REG argument
43 #define VR5_(_1, _2, _3, _4, _5, REG, ...) "ymm"#REG argument
44 #define VR6_(_1, _2, _3, _4, _5, _6, REG, ...) "ymm"#REG argument
45 #define VR7_(_1, _2, _3, _4, _5, _6, _7, REG, ...) "ymm"#REG argument
58 #define R_23(REG...) _R_23(REG, 1, 2, 3) argument
H A Dvdev_raidz_math_avx512bw.c42 #define VR0_(REG, ...) "zmm"#REG argument
43 #define VR1_(_1, REG, ...) "zmm"#REG argument
44 #define VR2_(_1, _2, REG, ...) "zmm"#REG argument
45 #define VR3_(_1, _2, _3, REG, ...) "zmm"#REG argument
46 #define VR4_(_1, _2, _3, _4, REG, ...) "zmm"#REG argument
47 #define VR5_(_1, _2, _3, _4, _5, REG, ...) "zmm"#REG argument
48 #define VR6_(_1, _2, _3, _4, _5, _6, REG, ...) "zmm"#REG argument
49 #define VR7_(_1, _2, _3, _4, _5, _6, _7, REG, ...) "zmm"#REG argument
62 #define R_23(REG...) _R_23(REG, 1, 2, 3) argument
H A Dvdev_raidz_math_sse2.c40 #define VR0_(REG, ...) "xmm"#REG argument
41 #define VR1_(_1, REG, ...) "xmm"#REG argument
42 #define VR2_(_1, _2, REG, ...) "xmm"#REG argument
43 #define VR3_(_1, _2, _3, REG, ...) "xmm"#REG argument
44 #define VR4_(_1, _2, _3, _4, REG, ...) "xmm"#REG argument
45 #define VR5_(_1, _2, _3, _4, _5, REG, ...) "xmm"#REG argument
46 #define VR6_(_1, _2, _3, _4, _5, _6, REG, ...) "xmm"#REG argument
47 #define VR7_(_1, _2, _3, _4, _5, _6, _7, REG, ...) "xmm"#REG argument
/freebsd-13.1/sys/dev/uart/
H A Duart_dev_imx.c101 GETREG(bas, REG(UCR1)), GETREG(bas, REG(UCR2)),
102 GETREG(bas, REG(UCR3)), GETREG(bas, REG(UCR4)),
103 GETREG(bas, REG(USR1)), GETREG(bas, REG(USR2)));
205 reg = GETREG(bas, REG(UFCR)); in imx_uart_init()
207 SETREG(bas, REG(UFCR), reg); in imx_uart_init()
208 SETREG(bas, REG(UBIR), 15); in imx_uart_init()
217 reg = GETREG(bas, REG(UFCR)); in imx_uart_init()
221 SETREG(bas, REG(UFCR), reg); in imx_uart_init()
236 SETREG(bas, REG(UTXD), c); in imx_uart_putc()
255 c = GETREG(bas, REG(URXD)); in imx_uart_getc()
[all …]
H A Duart_dev_imx.h200 #define REG(_r) IMXUART_ ## _r ## _REG macro
215 #define ENA(_bas, _r, _b) SET((_bas), REG(_r), FLD(_r, _b))
216 #define DIS(_bas, _r, _b) CLR((_bas), REG(_r), FLD(_r, _b))
217 #define IS(_bas, _r, _b) IS_SET((_bas), REG(_r), FLD(_r, _b))
/freebsd-13.1/contrib/cortex-strings/src/thumb-2/
H A Dstrcpy.c37 #define magic1(REG) "#0x01010101" argument
38 #define magic2(REG) "#0x80808080" argument
40 #define magic1(REG) #REG argument
41 #define magic2(REG) #REG ", lsl #7" argument
/freebsd-13.1/sys/contrib/alpine-hal/
H A Dal_hal_udma_debug.h60 #define AL_UDMA_PRINT_REG(UDMA, PREFIX, POSTFIX, TYPE, GROUP, REG) \ argument
61 al_dbg(PREFIX #REG " = 0x%08x" POSTFIX, al_reg_read32( \
62 &(UDMA->udma_regs->TYPE.GROUP.REG)))
65 UDMA, PREFIX, POSTFIX, FMT, TYPE, GROUP, REG, LBL, FIELD) \
67 &(UDMA->udma_regs->TYPE.GROUP.REG)) \
71 UDMA, PREFIX, POSTFIX, TYPE, GROUP, REG, LBL, FIELD) \
73 &(UDMA->udma_regs->TYPE.GROUP.REG)) \
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kInstrData.td41 /// 0 0 | SIZE | REG | MODE | MODE | REG
90 [(set REG.VT:$dst, (REG.Load MEMPat:$src))],
96 def NAME#REG.OOp.Letter#REG.Postfix : MxMove_RM<REG, REG.OOp, REG.OPat,
100 def NAME#REG.EOp.Letter#REG.Postfix : MxMove_RM<REG, REG.EOp, REG.EPat,
104 def NAME#REG.KOp.Letter#REG.Postfix : MxMove_RM<REG, REG.KOp, REG.KPat,
108 def NAME#REG.QOp.Letter#REG.Postfix : MxMove_RM<REG, REG.QOp, REG.QPat,
112 def NAME#REG.FOp.Letter#REG.Postfix : MxMove_RM<REG, REG.FOp, REG.FPat,
116 def NAME#REG.POp.Letter#REG.Postfix : MxMove_RM<REG, REG.POp, REG.PPat,
120 def NAME#REG.BOp.Letter#REG.Postfix : MxMove_RM<REG, REG.BOp, REG.BPat,
124 def NAME#REG.JOp.Letter#REG.Postfix : MxMove_RM<REG, REG.JOp, REG.JPat,
[all …]
H A DM68kInstrBits.td33 /// 0 0 0 0 | REG | 1 0 0 | MODE | REG
35 class MxBTSTEnc_R<MxBeadDReg REG, MxEncEA EA, MxEncExt EXT>
36 : MxEncoding<EA.Reg, EA.DA, EA.Mode, MxBead3Bits<0b100>, REG, MxBead4Bits<0b0000>,
42 /// 0 0 0 0 1 0 0 0 . 0 0 | MODE | REG
H A DM68kInstrShiftRotate.td38 /// 1 1 1 0 | REG/IMM | D | SIZE |R/I| OP | REG
H A DM68kInstrArithmetic.td39 /// x x x x | REG | OP MODE | MODE | REG
41 class MxArithEncoding<MxBead4Bits CMD, MxEncOpMode OPMODE, MxBead REG,
43 : MxEncoding<EA.Reg, EA.DA, EA.Mode, OPMODE.B0, OPMODE.B1, OPMODE.B2, REG,
50 /// x x x x | REG Rx | 1 | SIZE | 0 0 | M | REG Ry
64 /// x x x x x x x x | SIZE | MODE | REG
91 class MxBiArOp_RFRR_xEA<string MN, SDNode NODE, MxType TYPE, bits<4> CMD, MxBead REG>
97 REG,
474 /// 0 1 0 0 1 0 0 | OPMODE | 0 0 0 | REG
508 /// x x x x | REG | OP MODE | MODE | REG
684 /// 0 1 0 0 | x x x x | SIZE | MODE | REG
H A DM68kInstrControl.td84 /// 0 1 0 1 | CONDITION | 1 1 | MODE | REG
118 /// 0 1 0 0 1 1 1 0 1 1 | MODE | REG
209 /// 0 1 0 0 1 1 1 0 1 0 | MODE | REG
/freebsd-13.1/contrib/cortex-strings/benchmarks/dhry/
H A Ddhry_2.c20 #ifndef REG
21 #define REG macro
25 #define REG register macro
92 REG One_Fifty Int_Index; in Proc_8()
93 REG One_Fifty Int_Loc; in Proc_8()
139 REG One_Thirty Int_Loc; in Func_2()
H A Ddhry_1.c80 #define REG macro
84 #define REG register macro
87 void Proc_1 (REG Rec_Pointer Ptr_Val_Par);
126 REG One_Fifty Int_2_Loc; in main()
128 REG char Ch_Index; in main()
132 REG int Run_Index; in main()
133 REG int Number_Of_Runs; in main()
664 void Proc_1 (REG Rec_Pointer Ptr_Val_Par) in Proc_1()
669 REG Rec_Pointer Next_Record = Ptr_Val_Par->Ptr_Comp; in Proc_1()
/freebsd-13.1/sys/dev/pci/
H A Dpci.c674 #undef REG in pci_hdrtypedata()
684 vid = REG(PCIR_VENDOR, 2); in pci_read_device()
688 did = REG(PCIR_DEVICE, 2); in pci_read_device()
723 cfg->revid = REG(PCIR_REVID, 1); in pci_fill_devinfo()
765 #undef REG
802 val = REG(ptr, 4); in pci_ea_fill_info()
807 dw[b] = REG(ptr, 4); in pci_ea_fill_info()
839 #undef REG
1384 #undef REG in pci_read_vpd()
4186 #undef REG in pci_add_children()
[all …]
/freebsd-13.1/sys/dev/sym/
H A Dsym_defs.h552 #define REG(r) REGJ (nc_, r) macro
730 (0x68000000 | (SCR_REG_OFS(REG(reg))) | (op) | (((data)&0xff)<<8ul))
733 (0x70000000 | (SCR_REG_OFS(REG(reg))) | (op) | (((data)&0xff)<<8ul))
736 (0x78000000 | (SCR_REG_OFS(REG(reg))) | (op) | (((data)&0xff)<<8ul))
801 (0xe1000000 | (how) | (SCR_REG_OFS2(REG(reg))) | (n))
804 (0xe0000000 | (how) | (SCR_REG_OFS2(REG(reg))) | (n))
H A Dsym_fw.h202 #define RADDR_1(label) (RELOC_REGISTER | REG(label))
203 #define RADDR_2(label,ofs) (RELOC_REGISTER | ((REG(label))+(ofs)))
/freebsd-13.1/sys/dev/pccbb/
H A Dpccbb_pci.c115 #define PCI_MASK_CONFIG(DEV,REG,MASK,SIZE) \ argument
116 pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE)
117 #define PCI_MASK2_CONFIG(DEV,REG,MASK1,MASK2,SIZE) \ argument
118 pci_write_config(DEV, REG, ( \
119 pci_read_config(DEV, REG, SIZE) MASK1) MASK2, SIZE)
H A Dpccbb.c115 #define PCI_MASK_CONFIG(DEV,REG,MASK,SIZE) \ argument
116 pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE)
117 #define PCI_MASK2_CONFIG(DEV,REG,MASK1,MASK2,SIZE) \ argument
118 pci_write_config(DEV, REG, ( \
119 pci_read_config(DEV, REG, SIZE) MASK1) MASK2, SIZE)
/freebsd-13.1/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/
H A DMemRegion.cpp794 template <typename REG>
795 const REG *MemRegionManager::LazyAllocate(REG*& region) { in LazyAllocate()
797 region = A.Allocate<REG>(); in LazyAllocate()
798 new (region) REG(*this); in LazyAllocate()
804 template <typename REG, typename ARG>
805 const REG *MemRegionManager::LazyAllocate(REG*& region, ARG a) { in LazyAllocate()
807 region = A.Allocate<REG>(); in LazyAllocate()
808 new (region) REG(this, a); in LazyAllocate()
/freebsd-13.1/contrib/llvm-project/clang/include/clang/StaticAnalyzer/Core/PathSensitive/
H A DMemRegion.h1496 template <typename REG>
1497 const REG* LazyAllocate(REG*& region);
1499 template <typename REG, typename ARG>
1500 const REG* LazyAllocate(REG*& region, ARG a);

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