| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrSPE.td | 19 bits<5> RB;
25 let Inst{16-20} = RB;
32 let RB = 0;
46 bits<5> RB;
51 let Inst{16-20} = RB;
60 bits<5> RB;
66 let Inst{16-20} = RB;
73 let RB = 0;
87 bits<5> RB;
94 let Inst{16-20} = RB;
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| H A D | PPCExpandAtomicPseudoInsts.cpp | 147 Register RB = MI.getOperand(3).getReg(); in expandAtomicRMW128() local
153 BuildMI(CurrentMBB, DL, LL, Old).addReg(RA).addReg(RB); in expandAtomicRMW128()
195 BuildMI(CurrentMBB, DL, SC).addReg(Scratch).addReg(RA).addReg(RB); in expandAtomicRMW128()
224 Register RB = MI.getOperand(3).getReg(); in expandAtomicCmpSwap128() local
257 BuildMI(CurrentMBB, DL, LL, Old).addReg(RA).addReg(RB); in expandAtomicCmpSwap128()
277 BuildMI(CurrentMBB, DL, SC).addReg(Scratch).addReg(RA).addReg(RB); in expandAtomicCmpSwap128()
286 BuildMI(CurrentMBB, DL, SC).addReg(Old).addReg(RA).addReg(RB); in expandAtomicCmpSwap128()
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| H A D | PPCInstrHTM.td | 106 def : Pat<(int_ppc_tabortwc i32:$TO, i32:$RA, i32:$RB),
107 (TABORTWC (HTM_get_imm imm:$TO), $RA, $RB)>;
112 def : Pat<(int_ppc_tabortdc i32:$TO, i32:$RA, i32:$RB),
113 (TABORTDC (HTM_get_imm imm:$TO), $RA, $RB)>;
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| H A D | PPCInstrFormats.td | 564 bits<5> RB;
580 bits<5> RB;
614 bits<5> RB;
952 bits<5> RB;
971 bits<5> RB;
1216 bits<5> RB;
1414 bits<5> RB;
1742 bits<5> RB;
1759 let RB = 0;
1800 bits<5> RB;
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| H A D | PPCInstr64Bit.td | 932 (outs g8rc :$RT), (ins g8rc:$RA, g8rc:$RB, g8rc:$RC),
935 "maddld $RT, $RA, $RB, $RC", IIC_IntMulHD,
940 (outs g8rc :$RT), (ins g8rc:$RA, g8rc:$RB, g8rc:$RC),
941 "maddld $RT, $RA, $RB, $RC", IIC_IntMulHD,
1653 (ins g8rc:$RB, memrihash:$D_RA_XD),
1654 "hashst $RB, $D_RA_XD", IIC_IntGeneral, []>;
1656 (ins g8rc:$RB, memrihash:$D_RA_XD),
1666 (ins g8rc:$RB, memrihash:$D_RA_XD),
1669 (ins g8rc:$RB, memrihash:$D_RA_XD),
1827 def SLBIEG : XForm_26<31, 466, (outs), (ins gprc:$RS, gprc:$RB),
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| /freebsd-13.1/contrib/llvm-project/clang/lib/Rewrite/ |
| H A D | HTMLRewrite.cpp | 62 RB.InsertTextAfter(B, StartTag); in HighlightRange()
63 RB.InsertTextBefore(E, EndTag); in HighlightRange()
96 RB.InsertTextAfter(i, StartTag); in HighlightRange()
133 RB.ReplaceText(FilePos, 1, "<hr>"); in EscapeText()
142 RB.ReplaceText(FilePos, 1, in EscapeText()
151 RB.ReplaceText(FilePos, 1, "<"); in EscapeText()
156 RB.ReplaceText(FilePos, 1, ">"); in EscapeText()
220 RB.InsertTextBefore(B, OS.str()); in AddLineNumber()
222 RB.InsertTextBefore(B, OS.str()); in AddLineNumber()
223 RB.InsertTextBefore(E, "</td></tr>"); in AddLineNumber()
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| H A D | Rewriter.cpp | 162 const RewriteBuffer &RB = I->second; in getRangeSize() local
163 EndOff = RB.getMappedOffset(EndOff, opts.IncludeInsertsAtEndOfRange); in getRangeSize()
164 StartOff = RB.getMappedOffset(StartOff, !opts.IncludeInsertsAtBeginOfRange); in getRangeSize()
213 const RewriteBuffer &RB = I->second; in getRewrittenText() local
214 EndOff = RB.getMappedOffset(EndOff, true); in getRewrittenText()
215 StartOff = RB.getMappedOffset(StartOff); in getRewrittenText()
223 RewriteBuffer::iterator Start = RB.begin(); in getRewrittenText()
398 RewriteBuffer &RB = getEditBuffer(FID); in IncreaseIndentation() local
406 RB.InsertText(offs, indent, /*InsertAfter=*/false); in IncreaseIndentation()
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| /freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | RDFRegisters.h | 118 bool alias(RegisterRef RA, RegisterRef RB) const { in alias()
120 return !isRegMaskId(RB.Reg) ? aliasRR(RA, RB) : aliasRM(RA, RB); in alias()
121 return !isRegMaskId(RB.Reg) ? aliasRM(RB, RA) : aliasMM(RA, RB); in alias()
163 bool aliasRR(RegisterRef RA, RegisterRef RB) const;
182 static bool isCoverOf(RegisterRef RA, RegisterRef RB, in isCoverOf()
184 return RegisterAggr(PRI).insert(RA).hasCoverOf(RB); in isCoverOf()
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| /freebsd-13.1/contrib/llvm-project/clang/lib/Frontend/Rewrite/ |
| H A D | RewriteMacros.cpp | 94 RewriteBuffer &RB = Rewrite.getEditBuffer(SM.getMainFileID()); in RewriteMacrosInInput() local
133 RB.InsertTextAfter(SM.getFileOffset(RawTok.getLocation()), "//"); in RewriteMacrosInInput()
139 RB.InsertTextAfter(SM.getFileOffset(RawTok.getLocation()), "//"); in RewriteMacrosInInput()
169 RB.InsertTextAfter(RawOffs, &" /*"[HasSpace]); in RewriteMacrosInInput()
187 RB.InsertTextBefore(EndPos, "*/"); in RewriteMacrosInInput()
203 RB.InsertTextBefore(InsertPos, Expansion); in RewriteMacrosInInput()
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| /freebsd-13.1/contrib/llvm-project/compiler-rt/lib/sanitizer_common/ |
| H A D | sanitizer_ring_buffer.h | 27 RingBuffer *RB = reinterpret_cast<RingBuffer*>(Ptr); in New() local
29 RB->last_ = RB->next_ = reinterpret_cast<T*>(End - sizeof(T)); in New()
30 return RB; in New()
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| /freebsd-13.1/contrib/llvm-project/clang/lib/StaticAnalyzer/Checkers/ |
| H A D | MacOSXAPIChecker.cpp | 77 const MemRegion *RB = R->getBaseRegion(); in CheckDispatchOnce() local
78 const MemSpaceRegion *RS = RB->getMemorySpace(); in CheckDispatchOnce()
96 if (const VarRegion *VR = dyn_cast<VarRegion>(RB)) { in CheckDispatchOnce()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CSEInfo.cpp | 347 GISelInstProfileBuilder::addNodeIDRegType(const RegisterBank *RB) const { in addNodeIDRegType()
348 ID.AddPointer(RB); in addNodeIDRegType()
390 if (const auto *RB = RCOrRB.dyn_cast<const RegisterBank *>()) in addNodeIDReg() local
391 addNodeIDRegType(RB); in addNodeIDReg()
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| H A D | RegisterBankInfo.cpp | 93 if (auto *RB = RegClassOrBank.dyn_cast<const RegisterBank *>()) in getRegBank() local
94 return RB; in getRegBank()
140 const RegisterBank *RB = RegClassOrBank.get<const RegisterBank *>(); in constrainGenericRegister() local
142 if (RB && !RB->covers(RC)) in constrainGenericRegister()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | RDFRegisters.cpp | 136 bool PhysicalRegisterInfo::aliasRR(RegisterRef RA, RegisterRef RB) const { in aliasRR()
138 assert(Register::isPhysicalRegister(RB.Reg)); in aliasRR()
141 MCRegUnitMaskIterator UMB(RB.Reg, &TRI); in aliasRR()
152 if (PB.second.any() && (PB.second & RB.Mask).none()) { in aliasRR()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstructionSelector.cpp | 171 if (RB.getID() == X86::GPRRegBankID) { in getRegClass()
181 if (RB.getID() == X86::VECRRegBankID) { in getRegClass()
396 const RegisterBank &RB, in getLoadStoreOp() argument
405 if (X86::GPRRegBankID == RB.getID()) in getLoadStoreOp()
408 if (X86::GPRRegBankID == RB.getID()) in getLoadStoreOp()
411 if (X86::GPRRegBankID == RB.getID()) in getLoadStoreOp()
413 if (X86::VECRRegBankID == RB.getID()) in getLoadStoreOp()
421 if (X86::GPRRegBankID == RB.getID()) in getLoadStoreOp()
423 if (X86::VECRRegBankID == RB.getID()) in getLoadStoreOp()
510 const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI); in selectLoadStoreOp() local
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 486 if (RB.getID() == AArch64::GPRRegBankID) { in getRegClassForTypeOnBank()
498 if (RB.getID() == AArch64::FPRRegBankID) { in getRegClassForTypeOnBank()
518 unsigned RegBankID = RB.getID(); in getMinClassForRegBank()
581 switch (RB.getID()) { in getMinSizeForRegBank()
2835 if (RB.getID() != AArch64::GPRRegBankID) { in select()
3809 if (RB.getID() != AArch64::GPRRegBankID) in selectMergeValues()
4193 if (RB.getID() == AArch64::GPRRegBankID) { in getInsertVecEltOpInfo()
4774 unsigned LaneIdx, const RegisterBank &RB, in emitLaneInsert() argument
4787 if (RB.getID() == AArch64::FPRRegBankID) { in emitLaneInsert()
6153 if (RB != DstRB) { in fixupPHIOpBanks()
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| H A D | AArch64RegisterBankInfo.cpp | 98 #define CHECK_PARTIALMAP(Idx, ValStartIdx, ValLength, RB) \ in AArch64RegisterBankInfo() argument
101 checkPartialMap(PartialMappingIdx::Idx, ValStartIdx, ValLength, RB) && \ in AArch64RegisterBankInfo()
505 auto *RB = getRegBank(MI.getOperand(0).getReg(), MRI, TRI); in hasFPConstraints() local
506 if (RB == &AArch64::FPRRegBank) in hasFPConstraints()
508 if (RB == &AArch64::GPRRegBank) in hasFPConstraints()
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| H A D | AArch64RegisterBankInfo.h | 65 unsigned ValLength, const RegisterBank &RB);
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| /freebsd-13.1/sys/contrib/openzfs/module/lua/ |
| H A D | lvm.c | 552 #define RB(i) check_exp(getBMode(GET_OPCODE(i)) == OpArgR, base+GETARG_B(i)) macro
619 setobjs2s(L, ra, RB(i)); in luaV_execute()
650 Protect(luaV_gettable(L, RB(i), RKC(i), ra)); in luaV_execute()
674 StkId rb = RB(i); in luaV_execute()
700 TValue *rb = RB(i); in luaV_execute()
710 TValue *rb = RB(i); in luaV_execute()
715 Protect(luaV_objlen(L, ra, RB(i))); in luaV_execute()
765 TValue *rb = RB(i); in luaV_execute()
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| /freebsd-13.1/contrib/llvm-project/clang/include/clang/Rewrite/Core/ |
| H A D | HTMLRewrite.h | 47 void HighlightRange(RewriteBuffer &RB, unsigned B, unsigned E,
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| /freebsd-13.1/contrib/llvm-project/clang/lib/Frontend/ |
| H A D | PrecompiledPreamble.cpp | 543 for (const auto &RB : PreprocessorOpts.RemappedFileBuffers) { in CanReuse() local
545 PreambleFileHash::createForMemoryBuffer(RB.second->getMemBufferRef()); in CanReuse()
547 if (moveOnNoError(VFS.status(RB.first), Status)) in CanReuse()
550 OverridenFileBuffers[RB.first] = PreambleHash; in CanReuse()
552 llvm::SmallString<128> MappedPath(RB.first); in CanReuse()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonVLIWPacketizer.cpp | 255 MachineBasicBlock::iterator RB = Begin; in runOnMachineFunction() local
256 while (RB != End && HII->isSchedulingBoundary(*RB, &MB, MF)) in runOnMachineFunction()
257 ++RB; in runOnMachineFunction()
260 MachineBasicBlock::iterator RE = RB; in runOnMachineFunction()
267 if (RB != End) in runOnMachineFunction()
268 Packetizer.PacketizeMIs(&MB, RB, RE); in runOnMachineFunction()
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| H A D | HexagonGenInsert.cpp | 236 BitValueOrdering(const RegisterOrdering &RB) : BaseOrd(RB) {} in BitValueOrdering()
530 void buildOrderingBT(RegisterOrdering &RB, RegisterOrdering &RO) const;
627 void HexagonGenInsert::buildOrderingBT(RegisterOrdering &RB, in buildOrderingBT() argument
631 BitValueOrdering BVO(RB); in buildOrderingBT()
637 for (RegisterOrdering::iterator I = RB.begin(), E = RB.end(); I != E; ++I) in buildOrderingBT()
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| /freebsd-13.1/crypto/openssl/doc/man3/ |
| H A D | SSL_rstate_string.pod | 41 =item "RB"/"read body"
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64GenRegisterBankInfo.def | 128 const RegisterBank &RB) {
131 Map.RegBank == &RB;
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