| /freebsd-13.1/contrib/llvm-project/lldb/include/lldb/Core/ |
| H A D | Opcode.h | 29 class Opcode {
41 Opcode() = default;
79 case Opcode::eType8:
81 case Opcode::eType16:
85 case Opcode::eType32:
87 case Opcode::eType64:
99 case Opcode::eType8:
101 case Opcode::eType16:
105 case Opcode::eType32:
119 case Opcode::eType8:
[all …]
|
| /freebsd-13.1/contrib/llvm-project/lldb/source/Core/ |
| H A D | Opcode.cpp | 30 case Opcode::eType8: in Dump()
33 case Opcode::eType16: in Dump()
36 case Opcode::eType16_2: in Dump()
37 case Opcode::eType32: in Dump()
41 case Opcode::eType64: in Dump()
45 case Opcode::eTypeBytes: in Dump()
69 case Opcode::eType8: in GetDataByteOrder()
70 case Opcode::eType16: in GetDataByteOrder()
71 case Opcode::eType16_2: in GetDataByteOrder()
72 case Opcode::eType32: in GetDataByteOrder()
[all …]
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.h | 361 return isMUBUF(Opcode) || isMTBUF(Opcode) || isMIMG(Opcode); in isVMEM()
482 bool isDS(uint16_t Opcode) const { in isDS() argument
516 auto Flags = get(Opcode).TSFlags; in isSegmentSpecificFLAT()
545 bool isEXP(uint16_t Opcode) const { in isEXP() argument
579 bool isWQM(uint16_t Opcode) const { in isWQM() argument
611 bool isDPP(uint16_t Opcode) const { in isDPP() argument
1170 int getVOPe64(uint16_t Opcode);
1173 int getVOPe32(uint16_t Opcode);
1176 int getSDWAOp(uint16_t Opcode);
1179 int getDPPOp32(uint16_t Opcode);
[all …]
|
| H A D | R600InstrInfo.h | 85 bool isALUInstr(unsigned Opcode) const;
86 bool hasInstrModifiers(unsigned Opcode) const;
87 bool isLDSInstr(unsigned Opcode) const;
88 bool isLDSRetInstr(unsigned Opcode) const;
94 bool isTransOnly(unsigned Opcode) const;
96 bool isVectorOnly(unsigned Opcode) const;
98 bool isExport(unsigned Opcode) const;
100 bool usesVertexCache(unsigned Opcode) const;
102 bool usesTextureCache(unsigned Opcode) const;
159 bool isMov(unsigned Opcode) const;
[all …]
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFMISimplifyPatchable.cpp | 111 if (Opcode == BPF::LDB || Opcode == BPF::LDH || Opcode == BPF::LDW || in checkADDrr()
112 Opcode == BPF::LDD || Opcode == BPF::STB || Opcode == BPF::STH || in checkADDrr()
113 Opcode == BPF::STW || Opcode == BPF::STD) in checkADDrr()
115 else if (Opcode == BPF::LDB32 || Opcode == BPF::LDH32 || in checkADDrr()
116 Opcode == BPF::LDW32 || Opcode == BPF::STB32 || in checkADDrr()
117 Opcode == BPF::STH32 || Opcode == BPF::STW32) in checkADDrr()
130 if (Opcode == BPF::STB || Opcode == BPF::STH || Opcode == BPF::STW || in checkADDrr()
131 Opcode == BPF::STD || Opcode == BPF::STB32 || Opcode == BPF::STH32 || in checkADDrr()
132 Opcode == BPF::STW32) { in checkADDrr()
147 unsigned Opcode) { in checkShift() argument
[all …]
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZTargetTransformInfo.cpp | 81 switch (Opcode) { in getIntImmCostInst()
413 Opcode == Instruction::SDiv || Opcode == Instruction::SRem; in getArithmeticInstrCost()
415 Opcode == Instruction::UDiv || Opcode == Instruction::URem; in getArithmeticInstrCost()
438 if (Opcode == Instruction::FAdd || Opcode == Instruction::FSub || in getArithmeticInstrCost()
439 Opcode == Instruction::FMul || Opcode == Instruction::FDiv) in getArithmeticInstrCost()
491 if (Opcode == Instruction::Shl || Opcode == Instruction::LShr || in getArithmeticInstrCost()
513 if (Opcode == Instruction::FAdd || Opcode == Instruction::FSub || in getArithmeticInstrCost()
514 Opcode == Instruction::FMul || Opcode == Instruction::FDiv) { in getArithmeticInstrCost()
714 if (Opcode == Instruction::ZExt || Opcode == Instruction::UIToFP) in getBoolVecToIntConversionCost()
781 if (Opcode == Instruction::ZExt || Opcode == Instruction::SExt) { in getCastInstrCost()
[all …]
|
| H A D | SystemZInstrInfo.cpp | 252 unsigned Opcode; in emitGRX32Move() local
837 unsigned Opcode; in copyPhysReg() local
917 switch (Opcode) { in interpretAndImmediate()
1046 Opcode = (Opcode == SystemZ::AHI ? SystemZ::ASI : SystemZ::AGSI); in foldMemoryOperandImpl()
1088 switch (Opcode) { in foldMemoryOperandImpl()
1113 if (Opcode == SystemZ::LGDR || Opcode == SystemZ::LDGR) { in foldMemoryOperandImpl()
1629 return Opcode; in getOpcodeForOffset()
1645 switch (Opcode) { in getLoadAndTest()
1717 switch (Opcode) { in getFusedCompare()
1906 switch (Opcode) { in getLoadAndTrap()
[all …]
|
| /freebsd-13.1/contrib/llvm-project/clang/lib/AST/Interp/ |
| H A D | Opcodes.td | 92 class Opcode {
130 def Ret : Opcode {
138 def RetVoid : Opcode {
144 def RetValue : Opcode {
150 def NoRet : Opcode {}
157 def Destroy : Opcode {
184 def Zero : Opcode {
189 def Null : Opcode {
254 def This : Opcode;
413 def Pop : Opcode {
[all …]
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86AvoidStoreForwardingBlocks.cpp | 134 return Opcode == X86::MOVUPSrm || Opcode == X86::MOVAPSrm || in isXMMLoadOpcode()
135 Opcode == X86::VMOVUPSrm || Opcode == X86::VMOVAPSrm || in isXMMLoadOpcode()
136 Opcode == X86::VMOVUPDrm || Opcode == X86::VMOVAPDrm || in isXMMLoadOpcode()
137 Opcode == X86::VMOVDQUrm || Opcode == X86::VMOVDQArm || in isXMMLoadOpcode()
144 return Opcode == X86::VMOVUPSYrm || Opcode == X86::VMOVAPSYrm || in isYMMLoadOpcode()
145 Opcode == X86::VMOVUPDYrm || Opcode == X86::VMOVAPDYrm || in isYMMLoadOpcode()
146 Opcode == X86::VMOVDQUYrm || Opcode == X86::VMOVDQAYrm || in isYMMLoadOpcode()
154 return isXMMLoadOpcode(Opcode) || isYMMLoadOpcode(Opcode); in isPotentialBlockedMemCpyLd()
212 Opcode == X86::MOV32mr || Opcode == X86::MOV32mi || in isPotentialBlockingStoreInst()
213 Opcode == X86::MOV16mr || Opcode == X86::MOV16mi || in isPotentialBlockingStoreInst()
[all …]
|
| H A D | X86TargetTransformInfo.h | 123 unsigned Opcode, Type *Ty,
142 InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val,
147 InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src,
152 getMaskedMemoryOpCost(unsigned Opcode, Type *Src, Align Alignment,
155 InstructionCost getGatherScatterOpCost(unsigned Opcode, Type *DataTy,
184 unsigned Opcode, VectorType *Ty, Optional<FastMathFlags> FMF,
199 unsigned Opcode, FixedVectorType *VecTy, unsigned Factor,
204 unsigned Opcode, FixedVectorType *VecTy, unsigned Factor,
217 InstructionCost getIntImmCostInst(unsigned Opcode, unsigned Idx,
247 InstructionCost getGSScalarCost(unsigned Opcode, Type *DataTy,
[all …]
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCTargetTransformInfo.cpp | 251 switch (Opcode) { in getIntImmCostInst()
426 unsigned Opcode = 0; in mightUseCTR() local
518 Opcode = ISD::STRICT_FMA; in mightUseCTR()
521 Opcode = ISD::STRICT_FSQRT; in mightUseCTR()
527 Opcode = ISD::STRICT_FCEIL; in mightUseCTR()
533 Opcode = ISD::STRICT_FRINT; in mightUseCTR()
536 Opcode = ISD::STRICT_LRINT; in mightUseCTR()
595 Opcode = ISD::FSQRT; break; in mightUseCTR()
607 Opcode = ISD::FCEIL; break; in mightUseCTR()
631 if (Opcode) { in mightUseCTR()
[all …]
|
| /freebsd-13.1/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | Instruction.h | 189 return Opcode >= UnaryOpsBegin && Opcode < UnaryOpsEnd;
192 return Opcode >= BinaryOpsBegin && Opcode < BinaryOpsEnd;
196 return Opcode == UDiv || Opcode == SDiv || Opcode == URem || Opcode == SRem;
201 return Opcode >= Shl && Opcode <= AShr;
216 return Opcode == And || Opcode == Or || Opcode == Xor;
545 return Opcode == And || Opcode == Or || Opcode == Xor ||
546 Opcode == Add || Opcode == Mul;
558 switch (Opcode) {
576 return Opcode == And || Opcode == Or;
589 static bool isNilpotent(unsigned Opcode) {
[all …]
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerInfo.cpp | 83 OS << Opcode << ", Tys={"; in print()
89 OS << Opcode << ", MMOs={"; in print()
268 assert(Opcode >= FirstOp && Opcode <= LastOp && "Unsupported opcode"); in getOpcodeIdxForOpcode()
269 return Opcode - FirstOp; in getOpcodeIdxForOpcode()
382 for (unsigned Opcode = FirstOp; Opcode <= LastOp; ++Opcode) { in verify() local
383 const MCInstrDesc &MCID = MII.get(Opcode); in verify()
398 LLVM_DEBUG(dbgs() << MII.getName(Opcode) << " (opcode " << Opcode in verify()
405 FailedOpcodes.push_back(Opcode); in verify()
407 FailedOpcodes.push_back(Opcode); in verify()
411 for (unsigned Opcode : FailedOpcodes) in verify() local
[all …]
|
| /freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | LegacyLegalizerInfo.h | 84 unsigned Opcode; member
88 InstrAspect(unsigned Opcode, LLT Type) : Opcode(Opcode), Type(Type) {} in InstrAspect()
89 InstrAspect(unsigned Opcode, unsigned Idx, LLT Type) in InstrAspect()
90 : Opcode(Opcode), Idx(Idx), Type(Type) {} in InstrAspect()
93 return Opcode == RHS.Opcode && Idx == RHS.Idx && Type == RHS.Type;
182 const unsigned OpcodeIdx = Opcode - FirstOp; in setLegalizeScalarToDifferentSizeStrategy()
193 const unsigned OpcodeIdx = Opcode - FirstOp; in setLegalizeVectorElementToDifferentSizeStrategy()
322 const unsigned OpcodeIdx = Opcode - FirstOp; in setScalarAction()
329 const unsigned OpcodeIdx = Opcode - FirstOp; in setPointerAction()
345 unsigned OpcodeIdx = Opcode - FirstOp; in setScalarInVectorAction()
[all …]
|
| /freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetOpcodes.h | 30 inline bool isPreISelGenericOpcode(unsigned Opcode) { in isPreISelGenericOpcode() argument
31 return Opcode >= TargetOpcode::PRE_ISEL_GENERIC_OPCODE_START && in isPreISelGenericOpcode()
32 Opcode <= TargetOpcode::PRE_ISEL_GENERIC_OPCODE_END; in isPreISelGenericOpcode()
36 inline bool isTargetSpecificOpcode(unsigned Opcode) { in isTargetSpecificOpcode() argument
37 return Opcode > TargetOpcode::PRE_ISEL_GENERIC_OPCODE_END; in isTargetSpecificOpcode()
42 inline bool isPreISelGenericOptimizationHint(unsigned Opcode) { in isPreISelGenericOptimizationHint() argument
43 return Opcode >= TargetOpcode::PRE_ISEL_GENERIC_OPTIMIZATION_HINT_START && in isPreISelGenericOptimizationHint()
44 Opcode <= TargetOpcode::PRE_ISEL_GENERIC_OPTIMIZATION_HINT_END; in isPreISelGenericOptimizationHint()
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/DebugInfo/DWARF/ |
| H A D | DWARFExpression.cpp | 124 Opcode = Data.getU8(&Offset); in extract()
126 Desc = getOpDesc(Opcode); in extract()
237 if (Opcode == DW_OP_bregx || Opcode == DW_OP_regx || in prettyPrintRegisterOp()
240 else if (Opcode >= DW_OP_breg0 && Opcode < DW_OP_bregx) in prettyPrintRegisterOp()
247 if ((Opcode >= DW_OP_breg0 && Opcode <= DW_OP_breg31) || in prettyPrintRegisterOp()
248 Opcode == DW_OP_bregx) in prettyPrintRegisterOp()
275 if ((Opcode >= DW_OP_breg0 && Opcode <= DW_OP_breg31) || in print()
276 (Opcode >= DW_OP_reg0 && Opcode <= DW_OP_reg31) || in print()
277 Opcode == DW_OP_bregx || Opcode == DW_OP_regx || in print()
415 switch (Opcode) { in printCompactDWARFExpr()
[all …]
|
| /freebsd-13.1/contrib/llvm-project/llvm/tools/llvm-readobj/ |
| H A D | ARMEHABIPrinter.h | 99 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_00xxxxxx() local
105 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_01xxxxxx() local
124 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10011101() local
129 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10011111() local
134 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_1001nnnn() local
135 SW.startLine() << format("0x%02X ; vsp = r%u\n", Opcode, (Opcode & 0x0f)); in Decode_1001nnnn()
139 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10100nnn() local
146 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10101nnn() local
153 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10110000() local
170 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10110010_uleb128() local
[all …]
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonTargetTransformInfo.cpp | 164 assert(Opcode == Instruction::Load || Opcode == Instruction::Store); in getMemoryOpCost()
169 if (Opcode == Instruction::Store) in getMemoryOpCost()
170 return BaseT::getMemoryOpCost(Opcode, Src, Alignment, AddressSpace, in getMemoryOpCost()
211 return BaseT::getMemoryOpCost(Opcode, Src, Alignment, AddressSpace, in getMemoryOpCost()
216 HexagonTTIImpl::getMaskedMemoryOpCost(unsigned Opcode, Type *Src, in getMaskedMemoryOpCost() argument
230 unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, in getGatherScatterOpCost() argument
256 if (Opcode == Instruction::FCmp) in getCmpSelInstrCost()
263 unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, in getArithmeticInstrCost() argument
270 return BaseT::getArithmeticInstrCost(Opcode, Ty, CostKind, Opd1Info, in getArithmeticInstrCost()
310 if (Opcode == Instruction::InsertElement) { in getVectorInstrCost()
[all …]
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMUnwindOpAsm.h | 72 void EmitInt8(unsigned Opcode) { in EmitInt8() argument
73 Ops.push_back(Opcode & 0xff); in EmitInt8()
77 void EmitInt16(unsigned Opcode) { in EmitInt16() argument
78 Ops.push_back((Opcode >> 8) & 0xff); in EmitInt16()
79 Ops.push_back(Opcode & 0xff); in EmitInt16()
83 void emitBytes(const uint8_t *Opcode, size_t Size) { in emitBytes() argument
84 Ops.insert(Ops.end(), Opcode, Opcode + Size); in emitBytes()
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVTargetTransformInfo.cpp | 33 InstructionCost RISCVTTIImpl::getIntImmCostInst(unsigned Opcode, unsigned Idx, in getIntImmCostInst() argument
49 switch (Opcode) { in getIntImmCostInst()
75 if (Instruction::isCommutative(Opcode) || Idx == ImmArgIdx) { in getIntImmCostInst()
134 unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, in getGatherScatterOpCost() argument
137 return BaseT::getGatherScatterOpCost(Opcode, DataTy, Ptr, VariableMask, in getGatherScatterOpCost()
140 if ((Opcode == Instruction::Load && in getGatherScatterOpCost()
142 (Opcode == Instruction::Store && in getGatherScatterOpCost()
144 return BaseT::getGatherScatterOpCost(Opcode, DataTy, Ptr, VariableMask, in getGatherScatterOpCost()
149 return BaseT::getGatherScatterOpCost(Opcode, DataTy, Ptr, VariableMask, in getGatherScatterOpCost()
155 getMemoryOpCost(Opcode, VTy->getElementType(), Alignment, 0, CostKind, I); in getGatherScatterOpCost()
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 220 bool isAM3 = Opcode == ARM::LDRD || Opcode == ARM::STRD; in getMemoryOpOffset()
224 if (Opcode == ARM::t2LDRi12 || Opcode == ARM::t2LDRi8 || in getMemoryOpOffset()
225 Opcode == ARM::t2STRi12 || Opcode == ARM::t2STRi8 || in getMemoryOpOffset()
227 Opcode == ARM::LDRi12 || Opcode == ARM::STRi12) in getMemoryOpOffset()
231 if (Opcode == ARM::tLDRi || Opcode == ARM::tSTRi || in getMemoryOpOffset()
232 Opcode == ARM::tLDRspi || Opcode == ARM::tSTRspi) in getMemoryOpOffset()
781 Opcode = getLoadStoreMultipleOpcode(Opcode, Mode); in CreateLoadStoreMulti()
961 assert(isi32Store(Opcode) || Opcode == ARM::VSTRS || Opcode == ARM::VSTRD); in MergeOpsUpdate()
990 if (!isi32Load(Opcode) && !isi32Store(Opcode)) in mayCombineMisaligned()
1479 if (isi32Load(Opcode) || isi32Store(Opcode)) in MergeBaseUpdateLoadStore()
[all …]
|
| /freebsd-13.1/sys/contrib/dev/acpica/components/parser/ |
| H A D | psutils.c | 208 UINT16 Opcode) in AcpiPsInitOp() argument
214 Op->Common.AmlOpcode = Opcode; in AcpiPsInitOp()
217 (AcpiPsGetOpcodeInfo (Opcode))->Name, in AcpiPsInitOp()
239 UINT16 Opcode, in AcpiPsAllocOp() argument
250 OpInfo = AcpiPsGetOpcodeInfo (Opcode); in AcpiPsAllocOp()
262 else if (Opcode == AML_INT_BYTELIST_OP) in AcpiPsAllocOp()
286 AcpiPsInitOp (Op, Opcode); in AcpiPsAllocOp()
291 if (Opcode == AML_SCOPE_OP) in AcpiPsAllocOp()
|
| /freebsd-13.1/sys/contrib/dev/acpica/components/executer/ |
| H A D | exoparg2.c | 218 switch (WalkState->Opcode) in AcpiExOpcode_2A_0T_0R()
255 WalkState->Opcode)); in AcpiExOpcode_2A_0T_0R()
287 AcpiPsGetOpcodeName (WalkState->Opcode)); in AcpiExOpcode_2A_2T_1R()
292 switch (WalkState->Opcode) in AcpiExOpcode_2A_2T_1R()
328 WalkState->Opcode)); in AcpiExOpcode_2A_2T_1R()
398 AcpiPsGetOpcodeName (WalkState->Opcode)); in AcpiExOpcode_2A_1T_1R()
415 WalkState->Opcode, in AcpiExOpcode_2A_1T_1R()
421 switch (WalkState->Opcode) in AcpiExOpcode_2A_1T_1R()
594 WalkState->Opcode)); in AcpiExOpcode_2A_1T_1R()
690 switch (WalkState->Opcode) in AcpiExOpcode_2A_0T_1R()
[all …]
|
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| H A D | PPCPredicates.h | 70 Predicate InvertPredicate(Predicate Opcode);
74 Predicate getSwappedPredicate(Predicate Opcode);
77 inline unsigned getPredicateCondition(Predicate Opcode) { in getPredicateCondition() argument
78 return (unsigned)(Opcode & ~BR_HINT_MASK); in getPredicateCondition()
82 inline unsigned getPredicateHint(Predicate Opcode) { in getPredicateHint() argument
83 return (unsigned)(Opcode & BR_HINT_MASK); in getPredicateHint()
|
| /freebsd-13.1/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCInstrInfo.h | 62 const MCInstrDesc &get(unsigned Opcode) const { in get() argument
63 assert(Opcode < NumOpcodes && "Invalid opcode!"); in get()
64 return Desc[Opcode]; in get()
68 StringRef getName(unsigned Opcode) const { in getName() argument
69 assert(Opcode < NumOpcodes && "Invalid opcode!"); in getName()
70 return StringRef(&InstrNameData[InstrNameIndices[Opcode]]); in getName()
|