Home
last modified time | relevance | path

Searched refs:NumRegs (Results 1 – 25 of 63) sorted by relevance

123

/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/
H A DRegisterClassInfo.cpp98 unsigned NumRegs = RC->getNumRegs(); in compute() local
101 RCI.Order.reset(new MCPhysReg[NumRegs]); in compute()
131 RCI.NumRegs = N + CSRAlias.size(); in compute()
132 assert(RCI.NumRegs <= NumRegs && "Allocation order larger than regclass"); in compute()
145 if (StressRA && RCI.NumRegs > StressRA) in compute()
146 RCI.NumRegs = StressRA; in compute()
151 if (Super != RC && getNumAllocatableRegs(Super) > RCI.NumRegs) in compute()
159 for (unsigned I = 0; I != RCI.NumRegs; ++I) in compute()
H A DExecutionDomainFix.cpp71 assert(unsigned(rx) < NumRegs && "Invalid index"); in setLiveReg()
82 assert(unsigned(rx) < NumRegs && "Invalid index"); in kill()
92 assert(unsigned(rx) < NumRegs && "Invalid index"); in force()
122 for (unsigned rx = 0; rx != NumRegs; ++rx) in collapse()
144 for (unsigned rx = 0; rx != NumRegs; ++rx) { in merge()
160 LiveRegs.assign(NumRegs, nullptr); in enterBasicBlock()
178 for (unsigned rx = 0; rx != NumRegs; ++rx) { in enterBasicBlock()
420 assert(NumRegs == RC->getNumRegs() && "Bad regclass"); in runOnMachineFunction()
H A DLiveVariables.cpp424 for (unsigned Reg = 1, NumRegs = TRI->getNumRegs(); Reg != NumRegs; ++Reg) { in HandleRegMask() local
562 void LiveVariables::runOnBlock(MachineBasicBlock *MBB, const unsigned NumRegs) { in runOnBlock() argument
610 for (unsigned i = 0; i != NumRegs; ++i) in runOnBlock()
620 const unsigned NumRegs = TRI->getNumRegs(); in runOnMachineFunction() local
621 PhysRegDef.assign(NumRegs, nullptr); in runOnMachineFunction()
622 PhysRegUse.assign(NumRegs, nullptr); in runOnMachineFunction()
642 runOnBlock(MBB, NumRegs); in runOnMachineFunction()
644 PhysRegDef.assign(NumRegs, nullptr); in runOnMachineFunction()
645 PhysRegUse.assign(NumRegs, nullptr); in runOnMachineFunction()
H A DCFIInstrInserter.cpp156 unsigned NumRegs = TRI.getNumRegs(); in calculateCFAInfo() local
166 MBBInfo.IncomingCSRSaved.resize(NumRegs); in calculateCFAInfo()
167 MBBInfo.OutgoingCSRSaved.resize(NumRegs); in calculateCFAInfo()
186 unsigned NumRegs = TRI.getNumRegs(); in calculateOutgoingCFAInfo() local
187 BitVector CSRSaved(NumRegs), CSRRestored(NumRegs); in calculateOutgoingCFAInfo()
H A DRDFRegisters.cpp204 unsigned NumRegs = TRI.getNumRegs(); in aliasMM() local
208 for (unsigned w = 0, nw = NumRegs/32; w != nw; ++w) { in aliasMM()
219 unsigned TailRegs = NumRegs % 32; in aliasMM()
222 unsigned TW = NumRegs / 32; in aliasMM()
H A DVirtRegMap.cpp79 unsigned NumRegs = MF->getRegInfo().getNumVirtRegs(); in grow() local
80 Virt2PhysMap.resize(NumRegs); in grow()
81 Virt2StackSlotMap.resize(NumRegs); in grow()
82 Virt2SplitMap.resize(NumRegs); in grow()
H A DMachineRegisterInfo.cpp48 unsigned NumRegs = getTargetRegisterInfo()->getNumRegs(); in MachineRegisterInfo() local
51 UsedPhysRegMask.resize(NumRegs); in MachineRegisterInfo()
52 PhysRegUseDefLists.reset(new MachineOperand*[NumRegs]()); in MachineRegisterInfo()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DGCNNSAReassign.cpp86 bool canAssign(unsigned StartReg, unsigned NumRegs) const;
109 unsigned NumRegs = Intervals.size(); in tryAssignRegisters() local
111 for (unsigned N = 0; N < NumRegs; ++N) in tryAssignRegisters()
115 for (unsigned N = 0; N < NumRegs; ++N) in tryAssignRegisters()
119 for (unsigned N = 0; N < NumRegs; ++N) in tryAssignRegisters()
125 bool GCNNSAReassign::canAssign(unsigned StartReg, unsigned NumRegs) const { in canAssign()
126 for (unsigned N = 0; N < NumRegs; ++N) { in canAssign()
142 unsigned NumRegs = Intervals.size(); in scavengeRegs() local
144 if (NumRegs > MaxNumVGPRs) in scavengeRegs()
146 unsigned MaxReg = MaxNumVGPRs - NumRegs + AMDGPU::VGPR0; in scavengeRegs()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DInlineAsmLowering.cpp113 unsigned NumRegs = 1; in getRegistersForValue() local
115 NumRegs = in getRegistersForValue()
134 for (; NumRegs; --NumRegs, ++I) { in getRegistersForValue()
557 unsigned NumRegs = OpInfo.Regs.size(); in lowerInlineAsm() local
559 assert(NumRegs == SourceRegs.size() && in lowerInlineAsm()
563 if (NumRegs > 1) { in lowerInlineAsm()
569 unsigned Flag = InlineAsm::getFlagWord(InlineAsm::Kind_RegUse, NumRegs); in lowerInlineAsm()
584 unsigned NumRegs = OpInfo.Regs.size(); in lowerInlineAsm() local
585 if (NumRegs > 0) { in lowerInlineAsm()
587 InlineAsm::getFlagWord(InlineAsm::Kind_Clobber, NumRegs); in lowerInlineAsm()
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DRegisterClassInfo.h33 unsigned NumRegs = 0; member
42 return makeArrayRef(Order.get(), NumRegs);
93 return get(RC).NumRegs; in getNumAllocatableRegs()
H A DExecutionDomainFix.h125 const unsigned NumRegs; variable
140 : MachineFunctionPass(PassID), RC(&RC), NumRegs(RC.getNumRegs()) {} in ExecutionDomainFix()
H A DTargetRegisterInfo.h352 unsigned NumRegs = getNumRegs(); in getRegisterCosts() local
355 return makeArrayRef(&InfoDesc->CostPerUse[Idx * NumRegs], NumRegs); in getRegisterCosts()
H A DLiveVariables.h179 void runOnBlock(MachineBasicBlock *MBB, unsigned NumRegs);
/freebsd-13.1/contrib/llvm-project/llvm/lib/MCA/HardwareUnits/
H A DRegisterFile.cpp65 unsigned NumRegs) in RegisterFile() argument
69 initialize(SM, NumRegs);
72 void RegisterFile::initialize(const MCSchedModel &SM, unsigned NumRegs) { in initialize() argument
77 RegisterFiles.emplace_back(NumRegs); in initialize()
661 unsigned NumRegs = NumPhysRegs[I]; in isAvailable() local
662 if (!NumRegs) in isAvailable()
672 if (RMT.NumPhysRegs < NumRegs) { in isAvailable()
685 NumRegs = RMT.NumPhysRegs; in isAvailable()
688 if (RMT.NumPhysRegs < (RMT.NumUsedPhysRegs + NumRegs)) in isAvailable()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMSelectionDAGInfo.cpp231 unsigned NumRegs = NextEmittedNumMemOps - EmittedNumMemOps; in EmitTargetCodeForMemcpy() local
234 DAG.getConstant(NumRegs, dl, MVT::i32)); in EmitTargetCodeForMemcpy()
238 DstPtrInfo = DstPtrInfo.getWithOffset(NumRegs * VTSize); in EmitTargetCodeForMemcpy()
239 SrcPtrInfo = SrcPtrInfo.getWithOffset(NumRegs * VTSize); in EmitTargetCodeForMemcpy()
H A DARMExpandPseudoInsts.cpp161 uint8_t NumRegs; // D registers loaded or stored member
574 unsigned NumRegs = TableEntry->NumRegs; in ExpandVLD() local
695 unsigned NumRegs = TableEntry->NumRegs; in ExpandVST() local
738 if (NumRegs > 1 && TableEntry->copyAllListRegs) in ExpandVST()
771 unsigned NumRegs = TableEntry->NumRegs; in ExpandLaneOp() local
797 if (NumRegs > 1) in ExpandLaneOp()
799 if (NumRegs > 2) in ExpandLaneOp()
801 if (NumRegs > 3) in ExpandLaneOp()
824 if (NumRegs > 1) in ExpandLaneOp()
826 if (NumRegs > 2) in ExpandLaneOp()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCRegisterInfo.h157 unsigned NumRegs; // Number of entries in the array variable
367 NumRegs = NR; in InitMCRegisterInfo()
447 assert(RegNo < NumRegs &&
492 return NumRegs; in getNumRegs()
554 assert(RegNo < NumRegs && in getEncodingValue()
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/MCA/HardwareUnits/
H A DRegisterFile.h229 void initialize(const MCSchedModel &SM, unsigned NumRegs);
233 unsigned NumRegs = 0);
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyMachineFunctionInfo.cpp42 unsigned NumRegs = TLI.getNumRegisters(F.getContext(), VT); in computeLegalValueVTs() local
44 for (unsigned I = 0; I != NumRegs; ++I) in computeLegalValueVTs()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelDAGToDAG.cpp200 unsigned NumRegs = InlineAsm::getNumOperandRegisters(Flag); in tryInlineAsm() local
201 if (NumRegs) in tryInlineAsm()
218 || NumRegs != 2) in tryInlineAsm()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86CallingConv.cpp243 static const unsigned NumRegs = sizeof(RegList) / sizeof(RegList[0]); in CC_X86_32_MCUInReg() local
278 bool UseRegs = PendingMembers.size() <= std::min(2U, NumRegs - FirstFree); in CC_X86_32_MCUInReg()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64InstPrinter.cpp1354 unsigned NumRegs = 0; in printMatrixTileList() local
1357 ++NumRegs; in printMatrixTileList()
1366 if (Printed + 1 != NumRegs) in printMatrixTileList()
1383 unsigned NumRegs = 1; in printVectorList() local
1387 NumRegs = 2; in printVectorList()
1391 NumRegs = 3; in printVectorList()
1395 NumRegs = 4; in printVectorList()
1413 for (unsigned i = 0; i < NumRegs; ++i, Reg = getNextVectorRegister(Reg)) { in printVectorList()
1419 if (i + 1 != NumRegs) in printVectorList()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonBlockRanges.cpp474 unsigned NumRegs = TRI.getNumRegs(); in computeDeadMap() local
475 BitVector Visited(NumRegs); in computeDeadMap()
476 for (unsigned R = 1; R < NumRegs; ++R) { in computeDeadMap()
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/LiveDebugValues/
H A DInstrRefBasedImpl.cpp445 unsigned NumRegs; member in __anon36b66d1c0211::MLocTracker
495 NumRegs = TRI.getNumRegs(); in MLocTracker()
497 LocIDToLocIdx.resize(NumRegs, LocIdx::MakeIllegalLoc()); in MLocTracker()
561 LocIDToLocIdx.resize(NumRegs, LocIdx::MakeIllegalLoc()); in clear()
654 if (ID < NumRegs && ID != SP && MO->clobbersPhysReg(ID)) in writeRegMask()
708 return LocIdxToLocID[Idx] >= NumRegs; in isSpill()
726 if (ID >= NumRegs) in LocIdxToName()
727 return Twine("slot ").concat(Twine(ID - NumRegs)).str(); in LocIdxToName()
769 } else if (LocIdxToLocID[*MLoc] >= NumRegs) { in emitLoc()
771 const SpillLoc &Spill = SpillLocs[LocID - NumRegs + 1]; in emitLoc()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGBuilder.cpp342 unsigned NumRegs; in getCopyFromPartsVector() local
349 NumRegs = in getCopyFromPartsVector()
696 unsigned NumRegs; in getCopyToPartsVector() local
702 NumRegs = in getCopyToPartsVector()
790 unsigned NumRegs = in RegsForValue() local
802 Reg += NumRegs; in RegsForValue()
828 Parts.resize(NumRegs); in getCopyFromRegs()
886 Part += NumRegs; in getCopyFromRegs()
8338 unsigned NumRegs = 1; in GetRegistersForValue() local
8358 for (; NumRegs; --NumRegs, ++I) { in GetRegistersForValue()
[all …]

123