Lines Matching refs:NumRegs
342 unsigned NumRegs; in getCopyFromPartsVector() local
345 NumRegs = TLI.getVectorTypeBreakdownForCallingConv( in getCopyFromPartsVector()
349 NumRegs = in getCopyFromPartsVector()
354 assert(NumRegs == NumParts && "Part count doesn't match vector breakdown!"); in getCopyFromPartsVector()
355 NumParts = NumRegs; // Silence a compiler warning. in getCopyFromPartsVector()
696 unsigned NumRegs; in getCopyToPartsVector() local
698 NumRegs = TLI.getVectorTypeBreakdownForCallingConv( in getCopyToPartsVector()
702 NumRegs = in getCopyToPartsVector()
707 assert(NumRegs == NumParts && "Part count doesn't match vector breakdown!"); in getCopyToPartsVector()
708 NumParts = NumRegs; // Silence a compiler warning. in getCopyToPartsVector()
790 unsigned NumRegs = in RegsForValue() local
798 for (unsigned i = 0; i != NumRegs; ++i) in RegsForValue()
801 RegCount.push_back(NumRegs); in RegsForValue()
802 Reg += NumRegs; in RegsForValue()
822 unsigned NumRegs = RegCount[Value]; in getCopyFromRegs() local
828 Parts.resize(NumRegs); in getCopyFromRegs()
829 for (unsigned i = 0; i != NumRegs; ++i) { in getCopyFromRegs()
884 Values[Value] = getCopyFromParts(DAG, dl, Parts.begin(), NumRegs, in getCopyFromRegs()
886 Part += NumRegs; in getCopyFromRegs()
901 unsigned NumRegs = Regs.size(); in getCopyToRegs() local
902 SmallVector<SDValue, 8> Parts(NumRegs); in getCopyToRegs()
920 SmallVector<SDValue, 8> Chains(NumRegs); in getCopyToRegs()
921 for (unsigned i = 0; i != NumRegs; ++i) { in getCopyToRegs()
933 if (NumRegs == 1 || Flag) in getCopyToRegs()
944 Chain = Chains[NumRegs-1]; in getCopyToRegs()
992 unsigned NumRegs = TLI.getNumRegisters(*DAG.getContext(), ValueVTs[Value], in AddInlineAsmOperands() local
994 for (unsigned i = 0; i != NumRegs; ++i) { in AddInlineAsmOperands()
8338 unsigned NumRegs = 1; in GetRegistersForValue() local
8340 NumRegs = TLI.getNumRegisters(Context, OpInfo.ConstraintVT, RegVT); in GetRegistersForValue()
8358 for (; NumRegs; --NumRegs, ++I) { in GetRegistersForValue()
8684 unsigned NumRegs = InlineAsm::getNumOperandRegisters(OpFlag); in visitInlineAsm() local
8685 for (unsigned i = 0; i != NumRegs; ++i) in visitInlineAsm()
9427 unsigned NumRegs = getNumRegisters(CLI.RetTy->getContext(), RetVT); in LowerCallTo() local
9429 RetTys.append(NumRegs, RegisterVT); in LowerCallTo()
9430 for (unsigned j = 0; j != NumRegs; ++j) in LowerCallTo()
9493 unsigned NumRegs = getNumRegistersForCallingConv(CLI.RetTy->getContext(), in LowerCallTo() local
9495 for (unsigned i = 0; i != NumRegs; ++i) { in LowerCallTo()
9776 unsigned NumRegs = getNumRegistersForCallingConv(CLI.RetTy->getContext(), in LowerCallTo() local
9780 NumRegs, RegisterVT, VT, nullptr, in LowerCallTo()
9782 CurReg += NumRegs; in LowerCallTo()
10197 unsigned NumRegs = TLI->getNumRegistersForCallingConv( in LowerArguments() local
10199 for (unsigned i = 0; i != NumRegs; ++i) { in LowerArguments()
10205 if (NumRegs > 1 && i == 0) in LowerArguments()
10210 if (i == NumRegs - 1) in LowerArguments()