Searched refs:NextReg (Results 1 – 6 of 6) sorted by relevance
| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMFrameLowering.cpp | 1380 unsigned NextReg = ARM::D8; in emitAlignedDPRCS2Spills() local 1391 .addReg(NextReg) in emitAlignedDPRCS2Spills() 1394 NextReg += 4; in emitAlignedDPRCS2Spills() 1410 .addReg(NextReg) in emitAlignedDPRCS2Spills() 1413 NextReg += 4; in emitAlignedDPRCS2Spills() 1427 NextReg += 2; in emitAlignedDPRCS2Spills() 1433 MBB.addLiveIn(NextReg); in emitAlignedDPRCS2Spills() 1436 .addReg(NextReg) in emitAlignedDPRCS2Spills() 1525 NextReg += 4; in emitAlignedDPRCS2Restores() 1542 NextReg += 4; in emitAlignedDPRCS2Restores() [all …]
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCMIPeephole.cpp | 1112 unsigned NextReg = SrcReg; in getSrcVReg() local 1115 NextReg = getIncomingRegForBlock(Inst, BB1); in getSrcVReg() 1120 NextReg = Inst->getOperand(1).getReg(); in getSrcVReg() 1121 if (NextReg == SrcReg || !Register::isVirtualRegister(NextReg)) in getSrcVReg() 1123 SrcReg = NextReg; in getSrcVReg()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64FrameLowering.cpp | 2305 unsigned NextReg = CSI[i + RegInc].getReg(); in computeCalleeSaveRegisterPairs() local 2309 if (AArch64::GPR64RegClass.contains(NextReg) && in computeCalleeSaveRegisterPairs() 2310 !invalidateRegisterPairing(RPI.Reg1, NextReg, IsWindows, in computeCalleeSaveRegisterPairs() 2312 RPI.Reg2 = NextReg; in computeCalleeSaveRegisterPairs() 2315 if (AArch64::FPR64RegClass.contains(NextReg) && in computeCalleeSaveRegisterPairs() 2316 !invalidateWindowsRegisterPairing(RPI.Reg1, NextReg, NeedsWinCFI, in computeCalleeSaveRegisterPairs() 2318 RPI.Reg2 = NextReg; in computeCalleeSaveRegisterPairs() 2321 if (AArch64::FPR128RegClass.contains(NextReg)) in computeCalleeSaveRegisterPairs() 2322 RPI.Reg2 = NextReg; in computeCalleeSaveRegisterPairs()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 1321 Register NextReg = MI->getOperand(1).getReg(); in getTestBitReg() local 1323 if (!NextReg.isValid() || !MRI.hasOneNonDBGUse(NextReg)) in getTestBitReg() 1327 Reg = NextReg; in getTestBitReg() 1375 Register NextReg; in getTestBitReg() local 1383 NextReg = TestReg; in getTestBitReg() 1389 NextReg = TestReg; in getTestBitReg() 1396 NextReg = TestReg; in getTestBitReg() 1404 NextReg = TestReg; in getTestBitReg() 1419 NextReg = TestReg; in getTestBitReg() 1424 if (!NextReg.isValid()) in getTestBitReg() [all …]
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 2588 unsigned NextReg, NextRegNum, NextRegWidth; in ParseRegList() local 2591 if (!ParseAMDGPURegister(NextRegKind, NextReg, in ParseRegList() 2604 if (!AddNextRegisterToList(Reg, RegWidth, RegKind, NextReg, Loc)) in ParseRegList()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 6141 int NextReg = nextReg(((MipsOperand &)*Operands[1]).getGPR32Reg()); in ConvertXWPOperands() local 6142 Inst.addOperand(MCOperand::createReg(NextReg)); in ConvertXWPOperands()
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