1380   unsigned NextReg = ARM::D8;  in emitAlignedDPRCS2Spills()  local
1385     unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0,  in emitAlignedDPRCS2Spills()
1391         .addReg(NextReg)  in emitAlignedDPRCS2Spills()
1394     NextReg += 4;  in emitAlignedDPRCS2Spills()
1400   unsigned R4BaseReg = NextReg;  in emitAlignedDPRCS2Spills()
1404     unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0,  in emitAlignedDPRCS2Spills()
1410         .addReg(NextReg)  in emitAlignedDPRCS2Spills()
1413     NextReg += 4;  in emitAlignedDPRCS2Spills()
1419     unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0,  in emitAlignedDPRCS2Spills()
1427     NextReg += 2;  in emitAlignedDPRCS2Spills()
1433     MBB.addLiveIn(NextReg);  in emitAlignedDPRCS2Spills()
1436         .addReg(NextReg)  in emitAlignedDPRCS2Spills()
1438         .addImm((NextReg - R4BaseReg) * 2)  in emitAlignedDPRCS2Spills()
1513   unsigned NextReg = ARM::D8;  in emitAlignedDPRCS2Restores()  local
1517     unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0,  in emitAlignedDPRCS2Restores()
1519     BuildMI(MBB, MI, DL, TII.get(ARM::VLD1d64Qwb_fixed), NextReg)  in emitAlignedDPRCS2Restores()
1525     NextReg += 4;  in emitAlignedDPRCS2Restores()
1531   unsigned R4BaseReg = NextReg;  in emitAlignedDPRCS2Restores()
1535     unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0,  in emitAlignedDPRCS2Restores()
1537     BuildMI(MBB, MI, DL, TII.get(ARM::VLD1d64Q), NextReg)  in emitAlignedDPRCS2Restores()
1542     NextReg += 4;  in emitAlignedDPRCS2Restores()
1548     unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0,  in emitAlignedDPRCS2Restores()
1554     NextReg += 2;  in emitAlignedDPRCS2Restores()
1560     BuildMI(MBB, MI, DL, TII.get(ARM::VLDRD), NextReg)  in emitAlignedDPRCS2Restores()
1562         .addImm(2 * (NextReg - R4BaseReg))  in emitAlignedDPRCS2Restores()