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Searched refs:LogicOpcode (Results 1 – 3 of 3) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCombinerHelper.cpp1852 unsigned LogicOpcode = LogicMI->getOpcode(); in matchShiftOfShiftedLogic() local
1853 if (LogicOpcode != TargetOpcode::G_AND && LogicOpcode != TargetOpcode::G_OR && in matchShiftOfShiftedLogic()
1854 LogicOpcode != TargetOpcode::G_XOR) in matchShiftOfShiftedLogic()
2923 unsigned LogicOpcode = MI.getOpcode(); in matchHoistLogicOpWithSameOpcodeHands() local
2924 assert(LogicOpcode == TargetOpcode::G_AND || in matchHoistLogicOpWithSameOpcodeHands()
2925 LogicOpcode == TargetOpcode::G_OR || in matchHoistLogicOpWithSameOpcodeHands()
2926 LogicOpcode == TargetOpcode::G_XOR); in matchHoistLogicOpWithSameOpcodeHands()
2956 if (!isLegalOrBeforeLegalizer({LogicOpcode, {XTy, YTy}})) in matchHoistLogicOpWithSameOpcodeHands()
2991 InstructionBuildSteps LogicSteps(LogicOpcode, LogicBuildSteps); in matchHoistLogicOpWithSameOpcodeHands()
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp4815 unsigned LogicOpcode = N->getOpcode(); in hoistLogicOpWithSameOpcodeHands() local
4817 assert((LogicOpcode == ISD::AND || LogicOpcode == ISD::OR || in hoistLogicOpWithSameOpcodeHands()
4845 !TLI.isOperationLegalOrCustom(LogicOpcode, XVT)) in hoistLogicOpWithSameOpcodeHands()
4850 !TLI.isTypeDesirableForOp(LogicOpcode, XVT)) in hoistLogicOpWithSameOpcodeHands()
4853 SDValue Logic = DAG.getNode(LogicOpcode, DL, XVT, X, Y); in hoistLogicOpWithSameOpcodeHands()
4947 if (LogicOpcode == ISD::XOR && !ShOp.isUndef()) in hoistLogicOpWithSameOpcodeHands()
4952 SDValue Logic = DAG.getNode(LogicOpcode, DL, VT, in hoistLogicOpWithSameOpcodeHands()
4960 if (LogicOpcode == ISD::XOR && !ShOp.isUndef()) in hoistLogicOpWithSameOpcodeHands()
7986 unsigned LogicOpcode = LogicOp.getOpcode(); in combineShiftOfShiftedLogic() local
7987 if (LogicOpcode != ISD::AND && LogicOpcode != ISD::OR && in combineShiftOfShiftedLogic()
[all …]
H A DTargetLowering.cpp3498 unsigned LogicOpcode = Cond == ISD::SETEQ ? ISD::AND : ISD::OR; in simplifySetCCWithCTPOP() local
3499 return DAG.getNode(LogicOpcode, dl, VT, LHS, RHS); in simplifySetCCWithCTPOP()