4815   unsigned LogicOpcode = N->getOpcode();  in hoistLogicOpWithSameOpcodeHands()  local
4817   assert((LogicOpcode == ISD::AND || LogicOpcode == ISD::OR ||  in hoistLogicOpWithSameOpcodeHands()
4818           LogicOpcode == ISD::XOR) && "Expected logic opcode");  in hoistLogicOpWithSameOpcodeHands()
4845         !TLI.isOperationLegalOrCustom(LogicOpcode, XVT))  in hoistLogicOpWithSameOpcodeHands()
4850         !TLI.isTypeDesirableForOp(LogicOpcode, XVT))  in hoistLogicOpWithSameOpcodeHands()
4853     SDValue Logic = DAG.getNode(LogicOpcode, DL, XVT, X, Y);  in hoistLogicOpWithSameOpcodeHands()
4867     if (LegalOperations && !TLI.isOperationLegal(LogicOpcode, XVT))  in hoistLogicOpWithSameOpcodeHands()
4875     SDValue Logic = DAG.getNode(LogicOpcode, DL, XVT, X, Y);  in hoistLogicOpWithSameOpcodeHands()
4887     SDValue Logic = DAG.getNode(LogicOpcode, DL, XVT, X, Y);  in hoistLogicOpWithSameOpcodeHands()
4896     SDValue Logic = DAG.getNode(LogicOpcode, DL, XVT, X, Y);  in hoistLogicOpWithSameOpcodeHands()
4913       SDValue Logic = DAG.getNode(LogicOpcode, DL, XVT, X, Y);  in hoistLogicOpWithSameOpcodeHands()
4947     if (LogicOpcode == ISD::XOR && !ShOp.isUndef())  in hoistLogicOpWithSameOpcodeHands()
4952       SDValue Logic = DAG.getNode(LogicOpcode, DL, VT,  in hoistLogicOpWithSameOpcodeHands()
4960     if (LogicOpcode == ISD::XOR && !ShOp.isUndef())  in hoistLogicOpWithSameOpcodeHands()
4965       SDValue Logic = DAG.getNode(LogicOpcode, DL, VT, N0.getOperand(1),  in hoistLogicOpWithSameOpcodeHands()
7986   unsigned LogicOpcode = LogicOp.getOpcode();  in combineShiftOfShiftedLogic()  local
7987   if (LogicOpcode != ISD::AND && LogicOpcode != ISD::OR &&  in combineShiftOfShiftedLogic()
7988       LogicOpcode != ISD::XOR)  in combineShiftOfShiftedLogic()
8039   return DAG.getNode(LogicOpcode, DL, VT, NewShift1, NewShift2);  in combineShiftOfShiftedLogic()