Searched refs:LegalOps (Results 1 – 7 of 7) sorted by relevance
| /freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 3286 bool LegalOps; member 3292 DAG(InDAG), LegalTys(LT), LegalOps(LO) {} in TargetLoweringOpt() 3295 bool LegalOperations() const { return LegalOps; } in LegalOperations() 3662 bool LegalOps, bool OptForSize, 3669 bool LegalOps, bool OptForSize, 3673 getNegatedExpression(Op, DAG, LegalOps, OptForSize, Cost, Depth); 3684 SDValue getNegatedExpression(SDValue Op, SelectionDAG &DAG, bool LegalOps, 3687 return getNegatedExpression(Op, DAG, LegalOps, OptForSize, Cost, Depth);
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 1784 if (DemandedBits.isOneValue() && !TLO.LegalOps && !VT.isVector()) in SimplifyDemandedBits() 2761 if (Updated && !IdentityLHS && !IdentityRHS && !TLO.LegalOps) { in SimplifyDemandedVectorElts() 6059 if (LegalOps && !IsOpLegal) in getNegatedExpression() 6089 if (LegalOps && !IsOpLegal) in getNegatedExpression() 6110 if (LegalOps && !isOperationLegalOrCustom(ISD::FSUB, VT)) in getNegatedExpression() 6117 getNegatedExpression(X, DAG, LegalOps, OptForSize, CostX, Depth); in getNegatedExpression() 6125 getNegatedExpression(Y, DAG, LegalOps, OptForSize, CostY, Depth); in getNegatedExpression() 6173 getNegatedExpression(X, DAG, LegalOps, OptForSize, CostX, Depth); in getNegatedExpression() 6181 getNegatedExpression(Y, DAG, LegalOps, OptForSize, CostY, Depth); in getNegatedExpression() 6218 getNegatedExpression(Z, DAG, LegalOps, OptForSize, CostZ, Depth); in getNegatedExpression() [all …]
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.h | 785 SDValue getNegatedExpression(SDValue Op, SelectionDAG &DAG, bool LegalOps,
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| H A D | PPCISelLowering.cpp | 16449 bool LegalOps, bool OptForSize, in getNegatedExpression() argument 16472 getNegatedExpression(N2, DAG, LegalOps, OptForSize, N2Cost, Depth + 1); in getNegatedExpression() 16484 SDValue NegN0 = getNegatedExpression(N0, DAG, LegalOps, OptForSize, in getNegatedExpression() 16488 SDValue NegN1 = getNegatedExpression(N1, DAG, LegalOps, OptForSize, in getNegatedExpression() 16509 return TargetLowering::getNegatedExpression(Op, DAG, LegalOps, OptForSize, in getNegatedExpression() 16947 bool LegalOps = !DCI.isBeforeLegalizeOps(); in combineFMALike() local 16960 if (SDValue NegN0 = getCheaperNegatedExpression(N0, DAG, LegalOps, CodeSize)) in combineFMALike() 16965 if (SDValue NegN1 = getCheaperNegatedExpression(N1, DAG, LegalOps, CodeSize)) in combineFMALike()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 6416 if (!TLO.LegalOps) in targetShrinkDemandedConstant()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 1718 if (!TLO.LegalOps) in targetShrinkDemandedConstant()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 18926 if (!TLO.LegalOps) in targetShrinkDemandedConstant()
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