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Searched refs:Ld (Results 1 – 25 of 43) sorted by relevance

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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMParallelDSP.cpp332 if (auto *Ld = dyn_cast<LoadInst>(SExt->getOperand(0))) { in IsNarrowSequence() local
334 return LoadPairs.count(Ld) || OffsetLoads.count(Ld); in IsNarrowSequence()
354 auto *Ld = dyn_cast<LoadInst>(&I); in RecordMemoryOps() local
355 if (!Ld || !Ld->isSimple() || in RecordMemoryOps()
356 !Ld->hasOneUse() || !isa<SExtInst>(Ld->user_back())) in RecordMemoryOps()
358 Loads.push_back(Ld); in RecordMemoryOps()
H A DARMISelDAGToDAG.cpp4786 SDNode *Ld = CurDAG->getMachineNode(NewOpc, dl, ResTys, Ops); in Select() local
4789 CurDAG->setNodeMemRefs(cast<MachineSDNode>(Ld), {MemOp}); in Select()
4792 SDValue OutChain = isThumb ? SDValue(Ld, 2) : SDValue(Ld, 1); in Select()
4796 Result = SDValue(Ld, 0); in Select()
4801 dl, MVT::i32, SDValue(Ld, 0), SubRegIdx); in Select()
4809 Result = SDValue(Ld, 1); in Select()
4814 dl, MVT::i32, SDValue(Ld, 0), SubRegIdx); in Select()
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/
H A DGCRootLowering.cpp215 Value *Ld = new LoadInst(CI->getType(), CI->getArgOperand(1), "", CI); in DoLowering() local
216 Ld->takeName(CI); in DoLowering()
217 CI->replaceAllUsesWith(Ld); in DoLowering()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DLoopVersioningLICM.cpp366 LoadInst *Ld = dyn_cast<LoadInst>(I); in instructionSafeForVersioning() local
367 if (!Ld || !Ld->isSimple()) { in instructionSafeForVersioning()
372 Value *Ptr = Ld->getPointerOperand(); in instructionSafeForVersioning()
H A DLoopUnrollAndJamPass.cpp266 if (auto *Ld = dyn_cast<LoadInst>(&I)) { in computeUnrollAndJamCount() local
267 Value *V = Ld->getPointerOperand(); in computeUnrollAndJamCount()
H A DGVNHoist.cpp1069 if (auto *Ld = dyn_cast<LoadInst>(Repl)) { in makeGepOperandsAvailable() local
1070 Gep = dyn_cast<GetElementPtrInst>(Ld->getPointerOperand()); in makeGepOperandsAvailable()
H A DLoopInterchange.cpp101 if (auto *Ld = dyn_cast<LoadInst>(&I)) { in populateDependencyMatrix() local
102 if (!Ld->isSimple()) in populateDependencyMatrix()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZTargetTransformInfo.cpp887 if (LoadInst *Ld = dyn_cast<LoadInst>(I->getOperand(0))) in getCmpSelInstrCost() local
889 if (!Ld->hasOneUse() && Ld->getParent() == I->getParent() && in getCmpSelInstrCost()
979 isFoldableLoad(const LoadInst *Ld, const Instruction *&FoldedValue) { in isFoldableLoad() argument
980 if (!Ld->hasOneUse()) in isFoldableLoad()
982 FoldedValue = Ld; in isFoldableLoad()
983 const Instruction *UserI = cast<Instruction>(*Ld->user_begin()); in isFoldableLoad()
984 unsigned LoadedBits = getScalarSizeInBits(Ld->getType()); in isFoldableLoad()
H A DSystemZTargetTransformInfo.h110 bool isFoldableLoad(const LoadInst *Ld, const Instruction *&FoldedValue);
/freebsd-13.1/contrib/llvm-project/llvm/lib/Analysis/
H A DLoopAccessAnalysis.cpp1865 auto *Ld = dyn_cast<LoadInst>(&I); in analyzeLoop() local
1866 if (!Ld) { in analyzeLoop()
1867 recordAnalysis("CantVectorizeInstruction", Ld) in analyzeLoop()
1872 if (!Ld->isSimple() && !IsAnnotatedParallel) { in analyzeLoop()
1873 recordAnalysis("NonSimpleLoad", Ld) in analyzeLoop()
1880 Loads.push_back(Ld); in analyzeLoop()
1881 DepChecker->addAccess(Ld); in analyzeLoop()
1883 collectStridedAccess(Ld); in analyzeLoop()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrFragmentsSIMD.td836 auto *Ld = cast<LoadSDNode>(N);
837 return Ld->getAlignment() >= Ld->getMemoryVT().getStoreSize();
891 auto *Ld = cast<LoadSDNode>(N);
893 Ld->getAlignment() >= Ld->getMemoryVT().getStoreSize();
1066 auto *Ld = cast<MaskedLoadSDNode>(N);
1067 return Ld->getAlignment() >= Ld->getValueType(0).getStoreSize();
H A DX86ISelLowering.cpp8463 Ld = BaseLd; in findEltLoadSrc()
8862 SDValue Ld; in lowerBuildVectorAsBroadcast() local
24474 SDLoc dl(Ld); in LowerLoad()
31460 SDValue Ops[] = {Ld->getChain(), Ld->getBasePtr()}; in ReplaceNodeResults()
44705 if (!Ld) in combineAndLoadToBZHI()
45758 SDLoc dl(Ld); in combineLoad()
49232 VT, InVT, SDLoc(N), Ld->getChain(), Ld->getBasePtr(), in combineSIntToFP()
49233 Ld->getPointerInfo(), Ld->getOriginalAlign(), DAG); in combineSIntToFP()
50125 if (Ld->isSimple() && !Ld->isNonTemporal() && in combineConcatVectorOps()
50128 SDValue Ops[] = {Ld->getChain(), Ld->getBasePtr()}; in combineConcatVectorOps()
[all …]
H A DX86Schedule.td56 def Ld : SchedWrite;
59 let Folded = !cast<SchedWrite>(NAME#"Ld");
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelDAGToDAG.cpp1415 SDValue SuperReg = SDValue(Ld, 0); in SelectLoad()
1420 ReplaceUses(SDValue(N, NumVecs), SDValue(Ld, 1)); in SelectLoad()
1448 ReplaceUses(SDValue(N, NumVecs), SDValue(Ld, 0)); in SelectPostLoad()
1451 SDValue SuperReg = SDValue(Ld, 1); in SelectPostLoad()
1460 ReplaceUses(SDValue(N, NumVecs + 1), SDValue(Ld, 2)); in SelectPostLoad()
1662 SDValue SuperReg = SDValue(Ld, 0); in SelectLoadLane()
1674 ReplaceUses(SDValue(N, NumVecs), SDValue(Ld, 1)); in SelectLoadLane()
1708 ReplaceUses(SDValue(N, NumVecs), SDValue(Ld, 0)); in SelectPostLoadLane()
1711 SDValue SuperReg = SDValue(Ld, 1); in SelectPostLoadLane()
1729 ReplaceUses(SDValue(N, NumVecs + 1), SDValue(Ld, 2)); in SelectPostLoadLane()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelDAGToDAG.cpp1359 auto *Ld = dyn_cast<LoadSDNode>(Src); in Select() local
1360 if (!Ld) in Select()
1362 EVT MemVT = Ld->getMemoryVT(); in Select()
1376 SDValue Operands[] = {Ld->getBasePtr(), in Select()
1378 Ld->getChain()}; in Select()
H A DRISCVISelLowering.cpp1857 auto *Ld = cast<LoadSDNode>(V); in lowerVECTOR_SHUFFLE() local
1859 SDValue NewAddr = DAG.getMemBasePlusOffset(Ld->getBasePtr(), in lowerVECTOR_SHUFFLE()
1867 SDValue Ops[] = {Ld->getChain(), IntID, NewAddr, in lowerVECTOR_SHUFFLE()
1872 Ld->getMemOperand(), Offset, SVT.getStoreSize())); in lowerVECTOR_SHUFFLE()
1873 DAG.makeEquivalentMemoryOrdering(Ld, NewLoad); in lowerVECTOR_SHUFFLE()
1881 V = DAG.getLoad(SVT, DL, Ld->getChain(), NewAddr, in lowerVECTOR_SHUFFLE()
1883 Ld->getOriginalAlign(), in lowerVECTOR_SHUFFLE()
1884 Ld->getMemOperand()->getFlags()); in lowerVECTOR_SHUFFLE()
1888 Ld->getOriginalAlign(), in lowerVECTOR_SHUFFLE()
1889 Ld->getMemOperand()->getFlags()); in lowerVECTOR_SHUFFLE()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DLoopUnrollAndJam.cpp637 if (auto *Ld = dyn_cast<LoadInst>(&I)) { in getLoadsAndStores() local
638 if (!Ld->isSimple()) in getLoadsAndStores()
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp10862 if (!Ld || Ld->getExtensionType() != ISD::NON_EXTLOAD) in tryToFoldExtOfMaskedLoad()
10871 SDLoc dl(Ld); in tryToFoldExtOfMaskedLoad()
10874 VT, dl, Ld->getChain(), Ld->getBasePtr(), Ld->getOffset(), Ld->getMask(), in tryToFoldExtOfMaskedLoad()
10875 PassThru, Ld->getMemoryVT(), Ld->getMemOperand(), Ld->getAddressingMode(), in tryToFoldExtOfMaskedLoad()
12143 VT, SDLoc(N), Ld->getChain(), Ld->getBasePtr(), Ld->getOffset(), in visitSIGN_EXTEND_INREG()
12144 Ld->getMask(), Ld->getPassThru(), ExtVT, Ld->getMemOperand(), in visitSIGN_EXTEND_INREG()
12145 Ld->getAddressingMode(), ISD::SEXTLOAD, Ld->isExpandingLoad()); in visitSIGN_EXTEND_INREG()
17106 if (!Ld->isSimple() || Ld->isIndexed()) in getStoreMergeCandidates()
18100 if (Ld->getBasePtr() == Ptr && ST->getMemoryVT() == Ld->getMemoryVT() && in visitSTORE()
20354 if (!Ld || Ld->getExtensionType() || !Ld->isSimple() || in narrowExtractedVectorLoad()
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp3399 LoadSDNode *Ld = cast<LoadSDNode>(N); in ReplaceNodeResults() local
3402 if (Ld->getValueType(0) != MVT::i64 || Ld->getMemoryVT() != MVT::i64) in ReplaceNodeResults()
3407 Ld->getExtensionType(), dl, MVT::v2i32, Ld->getChain(), in ReplaceNodeResults()
3408 Ld->getBasePtr(), Ld->getPointerInfo(), MVT::v2i32, in ReplaceNodeResults()
3409 Ld->getOriginalAlign(), Ld->getMemOperand()->getFlags(), in ReplaceNodeResults()
3410 Ld->getAAInfo()); in ReplaceNodeResults()
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DSelectionDAGNodes.h2679 const LoadSDNode *Ld = dyn_cast<LoadSDNode>(N);
2680 return Ld && Ld->getExtensionType() == ISD::NON_EXTLOAD &&
2681 Ld->getAddressingMode() == ISD::UNINDEXED;
/freebsd-13.1/contrib/llvm-project/clang/lib/Analysis/
H A DThreadSafetyCommon.cpp837 til::SExpr *Ld = new (Arena) til::Load(Lp); in enterCFG() local
838 til::SExpr *V = addStatement(Ld, nullptr, Pm); in enterCFG()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelDAGToDAG.cpp3065 auto Ld = cast<LoadSDNode>(N); in isUniformLoad() local
3067 return Ld->getAlignment() >= 4 && in isUniformLoad()
3071 Ld->getAddressSpace() == AMDGPUAS::CONSTANT_ADDRESS || in isUniformLoad()
3072 Ld->getAddressSpace() == AMDGPUAS::CONSTANT_ADDRESS_32BIT in isUniformLoad()
3080 Ld->getAddressSpace() == AMDGPUAS::GLOBAL_ADDRESS && in isUniformLoad()
3081 Ld->isSimple() && in isUniformLoad()
H A DSIISelLowering.cpp7996 if (Ld->getAlignment() < 4 || Ld->isDivergent()) in widenLoad()
8000 unsigned AS = Ld->getAddressSpace(); in widenLoad()
8009 EVT MemVT = Ld->getMemoryVT(); in widenLoad()
8014 SDLoc SL(Ld); in widenLoad()
8020 SDValue Ptr = Ld->getBasePtr(); in widenLoad()
8023 Ld->getOffset(), in widenLoad()
8025 Ld->getAlignment(), in widenLoad()
8027 Ld->getAAInfo(), in widenLoad()
8038 if (Ld->getExtensionType() == ISD::SEXTLOAD) { in widenLoad()
8045 assert(Ld->getExtensionType() == ISD::EXTLOAD); in widenLoad()
[all …]
H A DSIISelLowering.h91 SDValue widenLoad(LoadSDNode *Ld, DAGCombinerInfo &DCI) const;
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonCommonGEP.cpp1037 if (LoadInst *Ld = dyn_cast<LoadInst>(R)) { in separateConstantChains() local
1039 if (&Ld->getOperandUse(PtrX) == U) in separateConstantChains()

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