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Searched refs:GPR (Results 1 – 25 of 136) sorted by relevance

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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoA.td215 : Pseudo<(outs GPR:$res, GPR:$scratch1, GPR:$scratch2),
226 : Pseudo<(outs GPR:$res, GPR:$scratch1, GPR:$scratch2),
240 : Pat<(intrin GPR:$addr, GPR:$incr, GPR:$mask, GPR:$shiftamt,
242 (AMOInst GPR:$addr, GPR:$incr, GPR:$mask, GPR:$shiftamt,
285 (CmpXchgInst GPR:$addr, GPR:$cmp, GPR:$new, 2)>;
287 (CmpXchgInst GPR:$addr, GPR:$cmp, GPR:$new, 4)>;
301 (ins GPR:$addr, GPR:$cmpval, GPR:$newval, GPR:$mask,
310 GPR:$addr, GPR:$cmpval, GPR:$newval, GPR:$mask, timm:$ordering),
312 GPR:$addr, GPR:$cmpval, GPR:$newval, GPR:$mask, timm:$ordering)>;
387 GPR:$addr, GPR:$cmpval, GPR:$newval, GPR:$mask, timm:$ordering),
[all …]
H A DRISCVInstrInfoB.td792 def : Pat<(and GPR:$rs1, (not GPR:$rs2)), (ANDN GPR:$rs1, GPR:$rs2)>;
793 def : Pat<(or GPR:$rs1, (not GPR:$rs2)), (ORN GPR:$rs1, GPR:$rs2)>;
794 def : Pat<(xor GPR:$rs1, (not GPR:$rs2)), (XNOR GPR:$rs1, GPR:$rs2)>;
898 def : Pat<(select (XLenVT (setne GPR:$x, GPR:$y)), GPR:$rs1, GPR:$rs3),
899 (CMOV GPR:$rs1, (XOR GPR:$x, GPR:$y), GPR:$rs3)>;
900 def : Pat<(select (XLenVT (seteq GPR:$x, GPR:$y)), GPR:$rs3, GPR:$rs1),
901 (CMOV GPR:$rs1, (XOR GPR:$x, GPR:$y), GPR:$rs3)>;
903 (CMOV GPR:$rs1, (SLTU GPR:$x, GPR:$y), GPR:$rs3)>;
905 (CMOV GPR:$rs1, (SLTU GPR:$x, GPR:$y), GPR:$rs3)>;
907 (CMOV GPR:$rs1, (SLT GPR:$x, GPR:$y), GPR:$rs3)>;
[all …]
H A DRISCVInstrInfo.td864 : Pat<(OpNode GPR:$rs1, GPR:$rs2), (Inst GPR:$rs1, GPR:$rs2)>;
955 def : Pat<(seteq GPR:$rs1, GPR:$rs2), (SLTIU (XOR GPR:$rs1, GPR:$rs2), 1)>;
959 def : Pat<(setne GPR:$rs1, GPR:$rs2), (SLTU X0, (XOR GPR:$rs1, GPR:$rs2))>;
962 def : Pat<(setugt GPR:$rs1, GPR:$rs2), (SLTU GPR:$rs2, GPR:$rs1)>;
963 def : Pat<(setuge GPR:$rs1, GPR:$rs2), (XORI (SLTU GPR:$rs1, GPR:$rs2), 1)>;
964 def : Pat<(setule GPR:$rs1, GPR:$rs2), (XORI (SLTU GPR:$rs2, GPR:$rs1), 1)>;
965 def : Pat<(setgt GPR:$rs1, GPR:$rs2), (SLT GPR:$rs2, GPR:$rs1)>;
966 def : Pat<(setge GPR:$rs1, GPR:$rs2), (XORI (SLT GPR:$rs1, GPR:$rs2), 1)>;
967 def : Pat<(setle GPR:$rs1, GPR:$rs2), (XORI (SLT GPR:$rs2, GPR:$rs1), 1)>;
1243 (ADDW GPR:$rs1, GPR:$rs2)>;
[all …]
H A DRISCVInstrInfoM.td75 def : Pat<(sext_inreg (mul GPR:$rs1, GPR:$rs2), i32),
76 (MULW GPR:$rs1, GPR:$rs2)>;
85 def : Pat<(and (riscv_divuw (assertzexti32 GPR:$rs1),
87 (DIVU GPR:$rs1, GPR:$rs2)>;
88 def : Pat<(and (riscv_remuw (assertzexti32 GPR:$rs1),
90 (REMU GPR:$rs1, GPR:$rs2)>;
95 def : Pat<(srem (sexti32 (i64 GPR:$rs1)), (sexti32 (i64 GPR:$rs2))),
96 (REMW GPR:$rs1, GPR:$rs2)>;
106 def : Pat<(i64 (mul (and GPR:$rs1, 0xffffffff), (and GPR:$rs2, 0xffffffff))),
107 (MULHU (SLLI GPR:$rs1, 32), (SLLI GPR:$rs2, 32))>;
[all …]
H A DRISCVInstrInfoF.td101 : RVInstR<0b1010000, funct3, OPC_OP_FP, (outs GPR:$rd),
112 (ins GPR:$rs1, simm12:$imm12),
121 (ins FPR32:$rs2, GPR:$rs1, simm12:$imm12),
253 (FLT_S GPR:$rd, FPR32:$rt, FPR32:$rs), 0>;
255 (FLE_S GPR:$rd, FPR32:$rt, FPR32:$rs), 0>;
261 def : InstAlias<"fscsr $rd, $rs", (CSRRW GPR:$rd, SysRegFCSR.Encoding, GPR:$rs)>;
267 def : InstAlias<"fssr $rd, $rs", (CSRRW GPR:$rd, SysRegFCSR.Encoding, GPR:$rs), 0>;
271 def : InstAlias<"fsrm $rd, $rs", (CSRRW GPR:$rd, SysRegFRM.Encoding, GPR:$rs)>;
277 def : InstAlias<"fsflags $rd, $rs", (CSRRW GPR:$rd, SysRegFFLAGS.Encoding, GPR:$rs)>;
375 def : Pat<(bitconvert (i32 GPR:$rs1)), (FMV_W_X GPR:$rs1)>;
[all …]
H A DRISCVInstrInfoD.td59 : RVInstR<0b1010001, funct3, OPC_OP_FP, (outs GPR:$rd),
71 (ins GPR:$rs1, simm12:$imm12),
314 : Pseudo<(outs FPR64:$dst), (ins GPR:$src1, GPR:$src2),
315 [(set FPR64:$dst, (RISCVBuildPairF64 GPR:$src1, GPR:$src2))]>;
320 : Pseudo<(outs GPR:$dst1, GPR:$dst2), (ins FPR64:$src),
321 [(set GPR:$dst1, GPR:$dst2, (RISCVSplitF64 FPR64:$src))]>;
341 def : Pat<(sint_to_fp (i32 GPR:$rs1)), (FCVT_D_W GPR:$rs1)>;
342 def : Pat<(uint_to_fp (i32 GPR:$rs1)), (FCVT_D_WU GPR:$rs1)>;
351 def : Pat<(bitconvert (i64 GPR:$rs1)), (FMV_D_X GPR:$rs1)>;
377 def : Pat<(sint_to_fp (i64 GPR:$rs1)), (FCVT_D_L GPR:$rs1, 0b111)>;
[all …]
H A DRISCVInstrInfoVVLPatterns.td443 (instruction vti.RegClass:$rs1, GPR:$rs2, GPR:$vl, vti.Log2SEW)>;
448 (instruction vti.RegClass:$rs1, GPR:$rs2, GPR:$vl, vti.Log2SEW)>;
599 GPR:$vl, vti.Log2SEW)>;
642 vti.RegClass:$rs1, GPR:$rs2, GPR:$vl, vti.Log2SEW)>;
712 wti.RegClass:$rs1, GPR:$rs2, GPR:$vl, vti.Log2SEW)>;
727 wti.RegClass:$rs1, GPR:$rs2, GPR:$vl, vti.Log2SEW)>;
898 vti.RegClass:$rs2, GPR:$rs1, VMV0:$vm, GPR:$vl, vti.Log2SEW)>;
1298 vti.RegClass:$rs2, GPR:$rs1, GPR:$vl, vti.Log2SEW)>;
1369 vti.RegClass:$rs2, GPR:$rs1, GPR:$vl, vti.Log2SEW)>;
1451 vti.RegClass:$rs1, GPR:$rs2, GPR:$vl, vti.Log2SEW)>;
[all …]
H A DRISCVInstrInfoZfh.td61 : RVInstR<0b1010010, funct3, OPC_OP_FP, (outs GPR:$rd),
72 (ins GPR:$rs1, simm12:$imm12),
81 (ins FPR16:$rs2, GPR:$rs1, simm12:$imm12),
237 (FLT_H GPR:$rd, FPR16:$rt, FPR16:$rs), 0>;
239 (FLE_H GPR:$rd, FPR16:$rt, FPR16:$rs), 0>;
315 def Select_FPR16_Using_CC_GPR : SelectCC_rrirr<FPR16, GPR>;
332 def : Pat<(riscv_fmv_h_x GPR:$src), (FMV_H_X GPR:$src)>;
348 def : Pat<(sint_to_fp (i32 GPR:$rs1)), (FCVT_H_W $rs1, 0b111)>;
349 def : Pat<(uint_to_fp (i32 GPR:$rs1)), (FCVT_H_WU $rs1, 0b111)>;
374 def : Pat<(sint_to_fp (i64 GPR:$rs1)), (FCVT_H_L $rs1, 0b111)>;
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiInstrInfo.td293 def R : InstRR<subOp, (outs GPR:$Rd), (ins GPR:$Rs1, GPR:$Rs2, pred:$DDDI),
295 [(set GPR:$Rd, (OpNode GPR:$Rs1, GPR:$Rs2))]>;
306 def R : InstRR<subOp, (outs GPR:$Rd), (ins GPR:$Rs1, GPR:$Rs2, pred:$DDDI),
308 [(set GPR:$Rd, (OpNode GPR:$Rs1, GPR:$Rs2))]>;
395 def : Pat<(LanaiSubbF GPR:$Rs1, GPR:$Rs2),
396 (SUBB_F_R GPR:$Rs1, GPR:$Rs2)>;
443 : InstRR<0b111, (outs GPR:$Rd), (ins GPR:$Rs1, GPR:$Rs2, pred:$DDDI), AsmStr,
449 [(set GPR:$Rd, (shl GPR:$Rs1, GPR:$Rs2))]>;
470 def : Pat<(srl GPR:$Rs1, GPR:$Rs2),
471 (SRL_R GPR:$Rs1, (SUB_R R0, GPR:$Rs2))>;
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstrInfo.td3893 // GPR:$dst = GPR:$a op GPR:$b
4029 def USADA8 : AI<(outs GPR:$Rd), (ins GPR:$Rn, GPR:$Rm, GPR:$Ra),
4419 (SMLAL GPR:$RdLo, GPR:$RdHi, GPR:$Rn, GPR:$Rm, GPR:$RLo, GPR:$RHi,
4426 (UMLAL GPR:$RdLo, GPR:$RdHi, GPR:$Rn, GPR:$Rm, GPR:$RLo, GPR:$RHi,
4452 (ins GPR:$Rn, GPR:$Rm, GPR:$Ra),
4461 [(set GPR:$Rd, (ARMsmmlar GPR:$Rn, GPR:$Rm, GPR:$Ra))]>,
4474 [(set GPR:$Rd, (ARMsmmlsr GPR:$Rn, GPR:$Rm, GPR:$Ra))]>,
4587 def : ARMV5TEPat<(ARMsmlalbb GPR:$Rn, GPR:$Rm, GPR:$RLo, GPR:$RHi),
4589 def : ARMV5TEPat<(ARMsmlalbt GPR:$Rn, GPR:$Rm, GPR:$RLo, GPR:$RHi),
4591 def : ARMV5TEPat<(ARMsmlaltb GPR:$Rn, GPR:$Rm, GPR:$RLo, GPR:$RHi),
[all …]
H A DARMInstrVFP.td239 AXDI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, dpr_reglist:$regs,
248 AXDI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, dpr_reglist:$regs,
271 AXSI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, spr_reglist:$regs,
284 AXSI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, spr_reglist:$regs,
1194 (outs GPR:$Rt, GPR:$Rt2), (ins DPR:$Dm),
1251 (outs DPR:$Dm), (ins GPR:$Rt, GPR:$Rt2),
1281 def : Pat<(fabs (arm_fmdrr GPR:$Rl, GPR:$Rh)),
1282 (VMOVDRR GPR:$Rl, (BFC GPR:$Rh, (i32 0x7FFFFFFF)))>,
1284 def : Pat<(fabs (arm_fmdrr GPR:$Rl, GPR:$Rh)),
1287 def : Pat<(fneg (arm_fmdrr GPR:$Rl, GPR:$Rh)),
[all …]
H A DARMInstrThumb2.td3137 def : Thumb2DSPPat<(int_arm_smlabb GPR:$a, GPR:$b, GPR:$acc),
3138 (t2SMLABB GPR:$a, GPR:$b, GPR:$acc)>;
3140 (t2SMLABT GPR:$a, GPR:$b, GPR:$acc)>;
3142 (t2SMLATB GPR:$a, GPR:$b, GPR:$acc)>;
3144 (t2SMLATT GPR:$a, GPR:$b, GPR:$acc)>;
3146 (t2SMLAWB GPR:$a, GPR:$b, GPR:$acc)>;
3148 (t2SMLAWT GPR:$a, GPR:$b, GPR:$acc)>;
3160 def : Thumb2DSPPat<(ARMsmlalbb GPR:$Rn, GPR:$Rm, GPR:$RLo, GPR:$RHi),
3162 def : Thumb2DSPPat<(ARMsmlalbt GPR:$Rn, GPR:$Rm, GPR:$RLo, GPR:$RHi),
3164 def : Thumb2DSPPat<(ARMsmlaltb GPR:$Rn, GPR:$Rm, GPR:$RLo, GPR:$RHi),
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFInstrInfo.td160 (ins GPR:$dst, GPR:$src, brtarget:$BrDst),
268 (ins GPR:$src2, GPR:$src),
559 (ins GPR:$lhs, GPR:$rhs, i64imm:$imm, GPR:$src, GPR:$src2),
564 (ins GPR:$lhs, i64imm:$rhs, i64imm:$imm, GPR:$src, GPR:$src2),
611 def : Pat<(BPFcall GPR:$dst), (JALX GPR:$dst)>;
626 [(set GPR:$dst, (OpNode ADDRri:$addr, GPR:$val))]> {
697 [(set GPR:$dst, (OpNode ADDRri:$addr, GPR:$val))]> {
754 [(set GPR:$dst, (OpNode ADDRri:$addr,GPR:$val))]> {
880 (ins GPR:$skb, GPR:$val),
882 [(set R0, (OpNode GPR:$skb, GPR:$val))]> {
[all …]
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYInstrInfo.td157 [(set GPR:$rz, (or GPR:$rx, uimm16:$imm16))]>;
162 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
163 [(set GPR:$rz, (shl GPR:$rx, uimm5:$imm5))]>;
165 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
166 [(set GPR:$rz, (srl GPR:$rx, uimm5:$imm5))]>;
168 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
169 [(set GPR:$rz, (sra GPR:$rx, uimm5:$imm5))]>;
171 (outs GPR:$rz), (ins GPR:$rx, uimm5:$imm5),
172 [(set GPR:$rz, (rotl GPR:$rx, uimm5:$imm5))]>;
192 "not32", [(set GPR:$rz, (not GPR:$rx))]>;
[all …]
H A DCSKYInstrFormats.td207 [(set GPR:$rz, (node GPR:$rx, ImmType:$imm12))]> {
240 (ins GPR:$rz, GPR:$rx, operand:$imm12), op, []>;
259 (ins GPR:$false, GPR:$rx, ImmType:$imm5),
323 [(set GPR:$rz, (opnode GPR:$rx, type))]>;
327 [(set GPR:$rz, (and GPR:$rx, (i32 v)))]>;
396 // Input: GPR:rx, GPR:ry
402 (ins GPR:$rx, GPR:$ry), op, [(set GPR:$rz, (opnode GPR:$rx, GPR:$ry))]> {
425 (outs GPR:$rz), (ins GPR:$rx, GPR:$ry, uimm_shift:$imm), op, []>;
428 (outs), (ins GPR:$rz, GPR:$rx, GPR:$ry, uimm_shift:$imm), op, []>;
449 (ins GPR:$rx, GPR:$ry),
[all …]
/freebsd-13.1/contrib/llvm-project/lldb/source/Plugins/Process/Utility/
H A DRegisterInfos_powerpc.h12 #define GPR_OFFSET(regname) (offsetof(GPR, regname))
13 #define FPR_OFFSET(regname) (sizeof(GPR) + offsetof(FPR, regname))
14 #define VMX_OFFSET(regname) (sizeof(GPR) + sizeof(FPR) + offsetof(VMX, regname))
15 #define GPR_SIZE(regname) (sizeof(((GPR *)NULL)->regname))
188 #define GPR GPR64 macro
190 #undef GPR
194 #define GPR GPR32 macro
196 #undef GPR
200 #define GPR GPR64 macro
205 (offsetof(GPR, regname) + (sizeof(((GPR *)NULL)->regname) - GPR_SIZE(reg)))
[all …]
H A DRegisterContextLinux_i386.cpp15 struct GPR { struct
61 GPR regs; // General purpose registers.
94 sizeof(((GPR *)nullptr)->orig_eax), in RegisterContextLinux_i386()
95 (LLVM_EXTENSION offsetof(GPR, orig_eax)), in RegisterContextLinux_i386()
108 size_t RegisterContextLinux_i386::GetGPRSize() const { return sizeof(GPR); } in GetGPRSize()
H A DRegisterInfoPOSIX_arm.cpp23 #define FPU_OFFSET(idx) ((idx)*4 + sizeof(RegisterInfoPOSIX_arm::GPR))
26 sizeof(RegisterInfoPOSIX_arm::GPR))
28 ((idx)*4 + sizeof(RegisterInfoPOSIX_arm::GPR) + \
32 sizeof(RegisterInfoPOSIX_arm::GPR) + sizeof(RegisterInfoPOSIX_arm::FPU) + \
43 (sizeof(RegisterInfoPOSIX_arm::GPR) + sizeof(RegisterInfoPOSIX_arm::FPU) + \
159 return sizeof(struct RegisterInfoPOSIX_arm::GPR); in GetGPRSize()
H A DRegisterContextLinux_x86_64.cpp45 } GPR; typedef
52 GPR gpr; // General purpose registers.
161 sizeof(((GPR *)nullptr)->orig_rax), in RegisterContextLinux_x86_64()
162 (LLVM_EXTENSION offsetof(GPR, orig_rax)), in RegisterContextLinux_x86_64()
175 size_t RegisterContextLinux_x86_64::GetGPRSize() const { return sizeof(GPR); } in GetGPRSize()
H A DRegisterContextOpenBSD_i386.cpp16 struct GPR { struct
46 GPR gpr; argument
62 size_t RegisterContextOpenBSD_i386::GetGPRSize() const { return sizeof(GPR); } in GetGPRSize()
H A DRegisterContextWindows_i386.cpp35 } GPR; typedef
37 #define GPR_OFFSET(regname) (LLVM_EXTENSION offsetof(GPR, regname))
41 #reg, alt, sizeof(((GPR *)nullptr)->reg), GPR_OFFSET(reg), eEncodingUint, \
89 size_t RegisterContextWindows_i386::GetGPRSize() const { return sizeof(GPR); } in GetGPRSize()
H A DRegisterContextDarwin_arm64.h66 struct GPR { struct
113 GPRWordCount = sizeof(GPR) / sizeof(uint32_t), // ARM_THREAD_STATE64_COUNT
122 GPR gpr;
202 virtual int DoReadGPR(lldb::tid_t tid, int flavor, GPR &gpr) { return -1; } in DoReadGPR()
210 virtual int DoWriteGPR(lldb::tid_t tid, int flavor, const GPR &gpr) = 0;
H A DRegisterContextDarwin_i386.h47 struct GPR { struct
106 GPRWordCount = sizeof(GPR) / sizeof(uint32_t),
113 GPR gpr;
183 virtual int DoReadGPR(lldb::tid_t tid, int flavor, GPR &gpr) = 0;
189 virtual int DoWriteGPR(lldb::tid_t tid, int flavor, const GPR &gpr) = 0;
H A DRegisterContextDarwin_x86_64.h47 struct GPR { struct
111 GPRWordCount = sizeof(GPR) / sizeof(uint32_t),
118 GPR gpr;
188 virtual int DoReadGPR(lldb::tid_t tid, int flavor, GPR &gpr) = 0;
194 virtual int DoWriteGPR(lldb::tid_t tid, int flavor, const GPR &gpr) = 0;
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64GenRegisterBankInfo.def28 // 6: GPR 32-bit value.
30 // 7: GPR 64-bit value.
32 // 8: GPR 128-bit value.
67 // 19: GPR 32-bit value.
71 // 22: GPR 64-bit value.
85 // 30: FPR 32-bit value to GPR 32-bit value.
88 // 32: FPR 64-bit value to GPR 64-bit value.
91 // 34: FPR 128-bit value to GPR 128-bit value (invalid)
100 // 40: GPR 32-bit value to FPR 32-bit value.
219 PMI_FirstGPR, // GPR
[all …]

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