| /freebsd-13.1/contrib/llvm-project/llvm/lib/Transforms/Vectorize/ |
| H A D | VectorCombine.cpp | 240 isa<ConstantInt>(Ext1->getIndexOperand()) && in getShuffleExtract()
267 return Ext1; in getShuffleExtract()
272 return Ext1; in getShuffleExtract()
277 return Index0 > Index1 ? Ext0 : Ext1; in getShuffleExtract()
291 isa<ConstantInt>(Ext1->getOperand(1)) && in isExtractExtractCheap()
348 !Ext1->hasOneUse() * Extract1Cost; in isExtractExtractCheap()
476 auto *Ext1 = cast<ExtractElementInst>(I1); in foldExtractExtract() local
496 Ext1 = NewExtract; in foldExtractExtract()
500 foldExtExtCmp(Ext0, Ext1, I); in foldExtractExtract()
502 foldExtExtBinop(Ext0, Ext1, I); in foldExtractExtract()
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| /freebsd-13.1/contrib/llvm-project/llvm/include/llvm/BinaryFormat/ |
| H A D | MsgPack.def | 94 HANDLE_MP_FIX_LEN(0x01, Ext1)
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/BinaryFormat/ |
| H A D | MsgPackWriter.cpp | 177 case FixLen::Ext1: in writeExt()
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| H A D | MsgPackReader.cpp | 121 return createExt(Obj, FixLen::Ext1); in read()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 9037 SDValue Ext1 = Ext.getValue(1); in LowerVectorExtend() local
9041 Ext1 = DAG.getNode(N->getOpcode(), DL, MVT::v8i32, Ext1); in LowerVectorExtend()
12920 SDValue Ext1 = Mul.getOperand(1); in PerformVQDMULHCombine() local
12922 Ext1.getOpcode() != ISD::SIGN_EXTEND) in PerformVQDMULHCombine()
12927 if (Ext1.getOperand(0).getValueType() != VecVT || in PerformVQDMULHCombine()
16110 SDValue Ext1 = in PerformVECREDUCE_ADDCombine() local
16115 Ext0, Ext1); in PerformVECREDUCE_ADDCombine()
16119 Ext0.getValue(1), Ext1.getValue(1)); in PerformVECREDUCE_ADDCombine()
18014 static bool areExtractExts(Value *Ext1, Value *Ext2) { in areExtractExts() argument
18020 if (!match(Ext1, m_ZExtOrSExt(m_Value())) || in areExtractExts()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 2647 auto Ext1 = B.buildFPExt(S32, Src1, Flags); in legalizeFPow() local
2650 .addUse(Ext1.getReg(0)) in legalizeFPow()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 14064 SDValue Ext1 = FirstInput.getOperand(0); in DAGCombineBuildVector() local
14066 if(Ext1.getOpcode() != ISD::EXTRACT_VECTOR_ELT || in DAGCombineBuildVector()
14070 ConstantSDNode *Ext1Op = dyn_cast<ConstantSDNode>(Ext1.getOperand(1)); in DAGCombineBuildVector()
14074 if (Ext1.getOperand(0).getValueType() != MVT::v4i32 || in DAGCombineBuildVector()
14075 Ext1.getOperand(0) != Ext2.getOperand(0)) in DAGCombineBuildVector()
14088 SDValue SrcVec = Ext1.getOperand(0); in DAGCombineBuildVector()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 11504 static bool areExtractExts(Value *Ext1, Value *Ext2) { in areExtractExts() argument
11510 if (!match(Ext1, m_ZExtOrSExt(m_Value())) || in areExtractExts()
11512 !areExtDoubled(cast<Instruction>(Ext1)) || in areExtractExts()
11573 auto Ext1 = cast<Instruction>(I->getOperand(0)); in shouldSinkOperands() local
11575 if (areExtractShuffleVectors(Ext1, Ext2)) { in shouldSinkOperands()
11576 Ops.push_back(&Ext1->getOperandUse(0)); in shouldSinkOperands()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 10380 SDValue Ext1 = DAG.getNode(Opcode, DL, VT, Op1); in tryToFoldExtendSelectLoad() local
10382 return DAG.getSelect(DL, VT, N0->getOperand(0), Ext1, Ext2); in tryToFoldExtendSelectLoad()
10998 SDValue Ext1 = DAG.getNode(ExtOpcode, DL, VT, N01); in foldSextSetcc() local
10999 return DAG.getSetCC(DL, VT, Ext0, Ext1, CC); in foldSextSetcc()
18695 SDValue Ext1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, Op1, Index); in scalarizeExtractedBinop() local
18696 return DAG.getNode(Vec.getOpcode(), DL, VT, Ext0, Ext1); in scalarizeExtractedBinop()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 41024 SDValue Ext1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, OpVT, in scalarizeExtEltFP() local
41026 return DAG.getNode(Vec.getOpcode(), DL, VT, Ext0, Ext1, Vec.getOperand(2)); in scalarizeExtEltFP()
41047 SDValue Ext1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, in scalarizeExtEltFP() local
41051 return DAG.getNode(ISD::SELECT, DL, VT, Ext0, Ext1, Ext2); in scalarizeExtEltFP()
50741 SDValue Ext1 = extractSubVector(InVec.getOperand(1), 0, DAG, DL, 128); in combineExtractSubvector() local
50743 return DAG.getNode(InOpcode, DL, VT, Ext0, Ext1, Ext2); in combineExtractSubvector()
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