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Searched refs:DemandedRHS (Results 1 – 6 of 6) sorted by relevance

/freebsd-13.1/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineSimplifyDemanded.cpp1418 APInt DemandedLHS(DemandedElts), DemandedRHS(DemandedElts); in SimplifyDemandedVectorElts() local
1432 DemandedRHS.clearBit(i); in SimplifyDemandedVectorElts()
1437 simplifyAndSetOp(I, 2, DemandedRHS, UndefElts3); in SimplifyDemandedVectorElts()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Analysis/
H A DValueTracking.cpp159 APInt &DemandedLHS, APInt &DemandedRHS) { in getShuffleDemandedElts() argument
168 DemandedLHS = DemandedRHS = APInt::getNullValue(NumElts); in getShuffleDemandedElts()
189 DemandedRHS.setBit(M % NumElts); in getShuffleDemandedElts()
1704 APInt DemandedLHS, DemandedRHS; in computeKnownBitsFromOperator() local
1705 if (!getShuffleDemandedElts(Shuf, DemandedElts, DemandedLHS, DemandedRHS)) { in computeKnownBitsFromOperator()
1718 if (!!DemandedRHS) { in computeKnownBitsFromOperator()
1720 computeKnownBits(RHS, DemandedRHS, Known2, Depth + 1, Q); in computeKnownBitsFromOperator()
3149 APInt DemandedLHS, DemandedRHS; in ComputeNumSignBitsImpl() local
3152 if (!getShuffleDemandedElts(Shuf, DemandedElts, DemandedLHS, DemandedRHS)) in ComputeNumSignBitsImpl()
3163 if (!!DemandedRHS) { in ComputeNumSignBitsImpl()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp1123 APInt DemandedRHS(NumElts, 0); in SimplifyDemandedBits() local
1132 DemandedRHS.clearAllBits(); in SimplifyDemandedBits()
1139 DemandedRHS.setBit(M - NumElts); in SimplifyDemandedBits()
1142 if (!!DemandedLHS || !!DemandedRHS) { in SimplifyDemandedBits()
1154 if (!!DemandedRHS) { in SimplifyDemandedBits()
1165 Op1, DemandedBits, DemandedRHS, TLO.DAG, Depth + 1); in SimplifyDemandedBits()
2701 APInt DemandedRHS(DemandedElts); in SimplifyDemandedVectorElts() local
2707 if (SimplifyDemandedVectorElts(Op.getOperand(2), DemandedRHS, UndefRHS, in SimplifyDemandedVectorElts()
2720 APInt DemandedRHS(NumElts, 0); in SimplifyDemandedVectorElts() local
2729 DemandedRHS.setBit(M - NumElts); in SimplifyDemandedVectorElts()
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H A DSelectionDAG.cpp2813 APInt DemandedLHS(NumElts, 0), DemandedRHS(NumElts, 0); in computeKnownBits() local
2827 DemandedRHS.clearAllBits(); in computeKnownBits()
2834 DemandedRHS.setBit((unsigned)M % NumElts); in computeKnownBits()
2845 if (!!DemandedRHS) { in computeKnownBits()
2847 Known2 = computeKnownBits(RHS, DemandedRHS, Depth + 1); in computeKnownBits()
3724 APInt DemandedLHS(NumElts, 0), DemandedRHS(NumElts, 0); in ComputeNumSignBits() local
3738 DemandedRHS.setBit((unsigned)M % NumElts); in ComputeNumSignBits()
3743 if (!!DemandedRHS) { in ComputeNumSignBits()
3744 Tmp2 = ComputeNumSignBits(Op.getOperand(1), DemandedRHS, Depth + 1); in ComputeNumSignBits()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp2905 SDValue DemandedRHS = TLI.SimplifyMultipleUseDemandedBits(RHS, Demanded, DAG); in simplifyMul24() local
2906 if (DemandedLHS || DemandedRHS) in simplifyMul24()
2909 DemandedRHS ? DemandedRHS : RHS); in simplifyMul24()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp6934 DemandedRHS.setBit(InnerIdx); in getPackDemandedElts()
34799 APInt DemandedLHS, DemandedRHS; in computeKnownBitsForTargetNode() local
34810 if (!!DemandedRHS) { in computeKnownBitsForTargetNode()
35046 APInt DemandedLHS, DemandedRHS; in ComputeNumSignBitsForTargetNode() local
35048 DemandedRHS); in ComputeNumSignBitsForTargetNode()
35054 if (!!DemandedRHS) in ComputeNumSignBitsForTargetNode()
38814 APInt DemandedLHS, DemandedRHS; in SimplifyDemandedVectorEltsForTargetNode() local
38851 APInt DemandedLHS, DemandedRHS; in SimplifyDemandedVectorEltsForTargetNode() local
39264 if (DemandedLHS || DemandedRHS) { in SimplifyDemandedBitsForTargetNode()
39266 DemandedRHS = DemandedRHS ? DemandedRHS : RHS; in SimplifyDemandedBitsForTargetNode()
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