Lines Matching refs:DemandedRHS
1123 APInt DemandedRHS(NumElts, 0); in SimplifyDemandedBits() local
1132 DemandedRHS.clearAllBits(); in SimplifyDemandedBits()
1139 DemandedRHS.setBit(M - NumElts); in SimplifyDemandedBits()
1142 if (!!DemandedLHS || !!DemandedRHS) { in SimplifyDemandedBits()
1154 if (!!DemandedRHS) { in SimplifyDemandedBits()
1155 if (SimplifyDemandedBits(Op1, DemandedBits, DemandedRHS, Known2, TLO, in SimplifyDemandedBits()
1165 Op1, DemandedBits, DemandedRHS, TLO.DAG, Depth + 1); in SimplifyDemandedBits()
2701 APInt DemandedRHS(DemandedElts); in SimplifyDemandedVectorElts() local
2707 if (SimplifyDemandedVectorElts(Op.getOperand(2), DemandedRHS, UndefRHS, in SimplifyDemandedVectorElts()
2720 APInt DemandedRHS(NumElts, 0); in SimplifyDemandedVectorElts() local
2729 DemandedRHS.setBit(M - NumElts); in SimplifyDemandedVectorElts()
2738 if (SimplifyDemandedVectorElts(Op.getOperand(1), DemandedRHS, UndefRHS, in SimplifyDemandedVectorElts()