| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonGenPredicate.cpp | 235 DefI->eraseFromParent(); in processPredicateGPR() 257 assert(DefI); in getPredRegFor() 258 unsigned Opc = DefI->getOpcode(); in getPredRegFor() 260 assert(DefI->getOperand(0).isDef() && DefI->getOperand(1).isUse()); in getPredRegFor() 261 RegisterSubReg PR = DefI->getOperand(1); in getPredRegFor() 267 MachineBasicBlock &B = *DefI->getParent(); in getPredRegFor() 268 DebugLoc DL = DefI->getDebugLoc(); in getPredRegFor() 274 if (isConvertibleToPredForm(DefI)) { in getPredRegFor() 275 MachineBasicBlock::iterator DefIt = DefI; in getPredRegFor() 331 if (!DefI) in isScalarPred() [all …]
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| H A D | HexagonExpandCondsets.cpp | 344 if (HII->isPredicated(*DefI)) in updateKillFlags() 421 Defs.insert(DefI->getParent()); in updateDeadsInRange() 422 if (HII->isPredicated(*DefI)) in updateDeadsInRange() 475 for (auto &Op : DefI->operands()) { in updateDeadsInRange() 492 if (!HII->isPredicated(*DefI)) in updateDeadsInRange() 499 MachineOperand &Op = DefI->getOperand(i); in updateDeadsInRange() 523 DefI->tieOperands(P.second, DefI->getNumOperands()-1); in updateDeadsInRange() 961 if (!DefI || !isPredicable(DefI)) in predicate() 1045 if (DefI->mayLoadOrStore()) in predicate() 1046 if (!canMoveMemTo(*DefI, TfrI, true)) in predicate() [all …]
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| H A D | HexagonVExtract.cpp | 149 MachineInstr *DefI = MRI.getVRegDef(VecR); in runOnMachineFunction() local 150 MachineBasicBlock::iterator At = std::next(DefI->getIterator()); in runOnMachineFunction() 151 MachineBasicBlock &DefB = *DefI->getParent(); in runOnMachineFunction() 155 Register AddrR = EmitAddr(DefB, At, DefI->getDebugLoc(), FI, 0); in runOnMachineFunction() 156 BuildMI(DefB, At, DefI->getDebugLoc(), HII->get(StoreOpc)) in runOnMachineFunction()
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| H A D | HexagonSplitDouble.cpp | 235 MachineInstr *DefI = MRI->getVRegDef(R); in partitionRegisters() local 239 if (!DefI || isFixedInstr(DefI)) in partitionRegisters() 404 const MachineInstr *DefI = MRI->getVRegDef(Reg); in profit() local 405 switch (DefI->getOpcode()) { in profit() 413 return profit(DefI); in profit() 426 MachineInstr *DefI = MRI->getVRegDef(DR); in isProfitable() local 427 int32_t P = profit(DefI); in isProfitable() 1136 MachineInstr *DefI = MRI->getVRegDef(DR); in splitPartition() local 1137 SplitIns.insert(DefI); in splitPartition()
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| H A D | HexagonGenInsert.cpp | 1025 const MachineInstr *DefI = MRI->getVRegDef(R); in findRemovableRegisters() local 1026 assert(DefI); in findRemovableRegisters() 1030 if (DefI->isPHI()) in findRemovableRegisters() 1032 getInstrUses(DefI, Regs[OtherS]); in findRemovableRegisters() 1161 const MachineInstr *DefI = MRI->getVRegDef(IR); in pruneUsesTooFar() local 1164 unsigned DIV = distance(DefI, DefV, RPO, M); in pruneUsesTooFar() 1347 const MachineInstr *DefI = MRI->getVRegDef(I->first); in selectCandidates() local 1348 getInstrUses(DefI, Us); in selectCandidates() 1445 MachineInstr *DefI = MRI->getVRegDef(I->first); in generateInserts() local 1447 DefI->eraseFromParent(); in generateInserts()
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| H A D | HexagonEarlyIfConv.cpp | 408 const MachineInstr *DefI = MRI->getVRegDef(R); in usesUndefVReg() local 410 assert(DefI && "Expecting a reaching def in MRI"); in usesUndefVReg() 411 if (DefI->isImplicitDef()) in usesUndefVReg()
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| H A D | HexagonConstExtenders.cpp | 1504 const MachineInstr *DefI = Rs.isVReg() ? MRI->getVRegDef(Rs.Reg) : nullptr; in calculatePlacement() local 1508 assert(!DefI || MDT->dominates(DefI->getParent(), DomB)); in calculatePlacement()
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| H A D | HexagonBitSimplify.cpp | 2298 MachineInstr *DefI = MRI.getVRegDef(Op0.getReg()); in genBitSplit() local 2299 assert(DefI != nullptr); in genBitSplit() 2300 if (!MDT.dominates(DefI, &*At)) in genBitSplit()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyRegStackify.cpp | 317 const MachineInstr *DefI = Def->getParent(); in isSafeToMove() local 319 assert(DefI->getParent() == Insert->getParent()); in isSafeToMove() 333 if (Def != DefI->defs().begin()) in isSafeToMove() 350 const MachineBasicBlock *MBB = DefI->getParent(); in isSafeToMove() 359 if (WebAssembly::isCatch(DefI->getOpcode())) in isSafeToMove() 364 for (const MachineOperand &MO : DefI->operands()) { in isSafeToMove() 394 query(*DefI, AA, Read, Write, Effects, StackPointer); in isSafeToMove() 403 MachineBasicBlock::const_iterator D(DefI), I(Insert); in isSafeToMove() 848 if (!DefI) in runOnMachineFunction() 853 if (DefI->isInlineAsm()) in runOnMachineFunction() [all …]
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MIRCanonicalizerPass.cpp | 239 MachineBasicBlock::iterator DefI = BBE; in rescheduleCanonically() local 244 if (DefI != BBE && UseI != BBE) in rescheduleCanonically() 248 DefI = BBI; in rescheduleCanonically() 258 if (DefI == BBE || UseI == BBE) in rescheduleCanonically() 263 DefI->dump(); in rescheduleCanonically() 270 MBB->splice(UseI, MBB, DefI); in rescheduleCanonically()
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| H A D | MachineTraceMetrics.cpp | 639 MachineRegisterInfo::def_iterator DefI = MRI->def_begin(VirtReg); in DataDep() local 640 assert(!DefI.atEnd() && "Register has no defs"); in DataDep() 641 DefMI = DefI->getParent(); in DataDep() 642 DefOp = DefI.getOperandNo(); in DataDep() 643 assert((++DefI).atEnd() && "Register has multiple defs"); in DataDep()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUSubtarget.cpp | 978 MachineInstr *DefI = Def->getInstr(); in adjustSchedDependency() local 981 if (DefI->isBundle()) { in adjustSchedDependency() 984 MachineBasicBlock::const_instr_iterator I(DefI->getIterator()); in adjustSchedDependency() 985 MachineBasicBlock::const_instr_iterator E(DefI->getParent()->instr_end()); in adjustSchedDependency() 999 unsigned Lat = InstrInfo.getInstrLatency(getInstrItineraryData(), *DefI); in adjustSchedDependency()
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| /freebsd-13.1/contrib/llvm-project/llvm/include/llvm/Analysis/ |
| H A D | LoopInfo.h | 1191 auto *DefI = dyn_cast<Instruction>(U.get()); in movementPreservesLCSSAForm() local 1192 if (!DefI) in movementPreservesLCSSAForm() 1198 auto *DefBlock = DefI->getParent(); in movementPreservesLCSSAForm()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Transforms/Utils/ |
| H A D | SimplifyIndVar.cpp | 1112 auto *DefI = dyn_cast<Instruction>(Def); in getInsertPointForUses() local 1113 if (!DefI) in getInsertPointForUses() 1116 assert(DT->dominates(DefI, InsertPt) && "def does not dominate all uses"); in getInsertPointForUses() 1118 auto *L = LI->getLoopFor(DefI->getParent()); in getInsertPointForUses()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | DeadStoreElimination.cpp | 1778 Instruction *DefI = Def->getMemoryInst(); in eliminateDeadWritesAtEndOfFunction() local 1780 auto DefLoc = getLocForWriteEx(DefI); in eliminateDeadWritesAtEndOfFunction() 1797 deleteDeadInstruction(DefI); in eliminateDeadWritesAtEndOfFunction()
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| /freebsd-13.1/contrib/llvm-project/clang/utils/TableGen/ |
| H A D | NeonEmitter.cpp | 1403 DefInit *DefI = cast<DefInit>(DI->getOperator()); in emitDag() local 1404 std::string Op = DefI->getAsString(); in emitDag()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/TableGen/ |
| H A D | Record.cpp | 2157 if (DefInit *DefI = dyn_cast<DefInit>(Val)) in getOperatorAsDef() local 2158 return DefI->getDef(); in getOperatorAsDef()
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