Lines Matching refs:DefI
234 MachineInstr *DefI = MRI->getVRegDef(Reg.R); in processPredicateGPR() local
235 DefI->eraseFromParent(); in processPredicateGPR()
256 MachineInstr *DefI = MRI->getVRegDef(Reg.R); in getPredRegFor() local
257 assert(DefI); in getPredRegFor()
258 unsigned Opc = DefI->getOpcode(); in getPredRegFor()
260 assert(DefI->getOperand(0).isDef() && DefI->getOperand(1).isUse()); in getPredRegFor()
261 RegisterSubReg PR = DefI->getOperand(1); in getPredRegFor()
267 MachineBasicBlock &B = *DefI->getParent(); in getPredRegFor()
268 DebugLoc DL = DefI->getDebugLoc(); in getPredRegFor()
274 if (isConvertibleToPredForm(DefI)) { in getPredRegFor()
275 MachineBasicBlock::iterator DefIt = DefI; in getPredRegFor()
330 const MachineInstr *DefI = MRI->getVRegDef(PR.R); in isScalarPred() local
331 if (!DefI) in isScalarPred()
333 unsigned DefOpc = DefI->getOpcode(); in isScalarPred()
355 for (const MachineOperand &MO : DefI->operands()) in isScalarPred()